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CS47L85 bảng dữ liệu(PDF) 18 Page - Cirrus Logic

tên linh kiện CS47L85
Giải thích chi tiết về linh kiện  Low-Power Smart Codec with Seven DSP Cores, Voice and Media Enhancement, and Integrated Sensor Hub
PDF  370 Pages
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nhà sản xuất  CIRRUS [Cirrus Logic]
Trang chủ  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

CS47L85 bảng dữ liệu(HTML) 18 Page - Cirrus Logic

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CS47L85
18
Rev 4.3
Test Conditions
The following electrical characteristics are valid across the full range of recommended operating conditions.
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Line / Headphone / Earpiece Output Driver (HPOUTnL, HPOUTnR)
Load resistance
Normal operation,
Single-ended mode
6
Ω
Normal operation,
Differential (BTL) mode
15
Device survival with load
applied indefinitely
0
Load capacitance
Single-ended mode
500
pF
Differential (BTL) mode
200
Speaker Output Driver (SPKOUTLP+SPKOUTLN, SPKOUTRP+SPKOUTRN)
Load resistance
Normal operation
4
Ω
Device survival with load
applied indefinitely
0
Load capacitance
200
pF
Digital Speaker Output (SPKDAT1, SPKDAT2)
Full-scale output level
(0dBFS digital core output)
0dB gain
-6
dBFS
Notes:
1.
The digital output signal level is measured in dBFS, where 0dBFS is a signal level equal to the full-scale range (FSR) of the PDM output.
The FSR is defined as the amplitude of a 1kHz sine wave whose positive and negative peaks are represented by the maximum and
minimum digital codes respectively - this is the largest 1kHz sine wave that will fit in the digital output range without clipping.
Test Conditions
DBVDD1 = DBVDD2 = DBVDD3 = DBVDD4 = CPVDD1 = AVDD = LDOVDD = 1.8V, CPVDD2 = 1.2V,
DCVDD = FLLVDD = 1.2V (powered from LDO1), MICVDD = 2.5V (powered from LDO2), SPKVDDL = SPKVDDR = 4.2V,
TA = +25ºC, 1kHz sinusoid signal, fs = 48kHz, PGA gain = 0dB, 24-bit audio data unless otherwise stated.
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Line / Headphone / Earpiece Output Driver (HPOUTnL, HPOUTnR)
DC offset at Load
Single-ended mode
100
100
µV
Differential (BTL) mode
200
Speaker Output Driver (SPKOUTLP+SPKOUTLN, SPKOUTRP+SPKOUTRN)
DC offset at Load
3
mV
SPKVDD leakage current
1
µA



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