CS47L85 datasheet(11/370 Pages) CIRRUS

11 / 370 page

CS47L85

Rev 4.3

PIN NO

NAME

TYPE

DESCRIPTION

IN2ARP

Analogue Input

Right channel single-ended Mic/Line input /

Right channel positive differential Mic/Line input

IN2BLN

Analogue Input

Left channel negative differential Mic/Line input.

Also suitable for connection to external accessory interfaces.

IN2BLP

Analogue Input

Left channel single-ended Mic/Line input /

Left channel positive differential Mic/Line input.

Also suitable for connection to external accessory interfaces.

IN2BR

Analogue Input

Right channel single-ended Mic/Line input.

Also suitable for connection to external accessory interfaces.

IN3LN/

DMICCLK3

Analogue Input / Digital

Output

Left channel negative differential Mic/Line input /

Digital MIC clock output 3

IN3LP

Analogue Input

Left channel single-ended Mic/Line input /

Left channel positive differential Mic/Line input

IN3RN/

DMICDAT3

Analogue input / Digital

Input

Right channel negative differential Mic/Line input /

Digital MIC data input 3

IN3RP

Analogue Input

Right channel single-ended Mic/Line input /

Right channel positive differential Mic/Line input

F11

IRQ

¯¯¯

Digital Output

Interrupt Request (IRQ) output (default is active low).

The pin configuration is selectable CMOS or Open Drain.

C11

JACKDET1

Analogue Input

Jack detect input 1

C12

JACKDET2

Analogue Input

Jack detect input 2

E13

LDOENA

Digital Input

Enable pin for LDO1 (generates DCVDD supply).

Logic 1 input enables LDO1. If using external DCVDD supply, then

LDO1 is not used, and LDOENA must be held at logic 0.

F14

LDOVDD

Supply

Supply for LDO1

E14

LDOVOUT

Analogue Output

LDO1 output.

If using external DCVDD, then LDOVOUT must be left floating.

F12

MCLK1

Digital Input

Master clock 1

M13

MCLK2

Digital Input

Master clock 2

MICBIAS1

Analogue Output

Microphone bias 1

MICBIAS2

Analogue Output

Microphone bias 2

MICBIAS3

Analogue Output

Microphone bias 3

MICBIAS4

Analogue Output

Microphone bias 4

B14

MICDET1/

HPOUT1FB2

Analogue Input

Microphone & accessory sense input 1/

HPOUT1L and HPOUT1R ground feedback pin 2

MICVDD

Analogue Output

LDO2 output decoupling pin (generated internally by CS47L85).

(Can also be used as reference/supply for external microphones.)

K12

MIF1SCLK/

GPIO9

Digital Input / Output

Master (I2C) Interface 1 clock output / GPIO9.

GPIO output is selectable CMOS or Open Drain;

SCLK output is Open Drain.

L12

MIF1SDA/

GPIO10

Digital Input / Output

Master (I2C) Interface 1 data input and output / GPIO10.

GPIO output is selectable CMOS or Open Drain;

SDA output is Open Drain.

M10

MIF2SCLK/

GPIO11

Digital Input / Output

Master (I2C) Interface 2 clock output / GPIO11.

GPIO output is selectable CMOS or Open Drain;

SCLK output is Open Drain.

MIF2SDA/

GPIO12

Digital Input / Output

Master (I2C) Interface 2 data input and output / GPIO12.

GPIO output is selectable CMOS or Open Drain;

SDA output is Open Drain.

MIF3SCLK/

GPIO13

Digital Input / Output

Master (I2C) Interface 3 clock output / GPIO13.

GPIO output is selectable CMOS or Open Drain;

SCLK output is Open Drain.

MIF3SDA/

GPIO14

Digital Input / Output

Master (I2C) Interface 3 data input and output / GPIO14.

GPIO output is selectable CMOS or Open Drain;

SDA output is Open Drain.

F13

RESET

¯¯¯¯¯¯

Digital Input

Digital Reset input (active low)

M14

SLIMCLK

Digital Input / Output

SLIM Bus Clock input / output

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