SPC572L64F2 datasheet(16/112 Pages) STMICROELECTRONICS

16 / 112 page

Package pinouts and signal descriptions

SPC572Lx

16/112

DocID027866 Rev 5

2.2.3

LVDS pins

Table 5 contains information on LVDS pin functions for the devices.

2.2.4

Generic pins

The I/O Signal Description Table contains information on generic pins. See the I/O Signal

Description and Input Multiplexing Tables (Excel file) attached to this document. Locate the

XTAL

Analog output of the oscillator amplifier circuit

needs to be grounded if oscillator is used in bypass

mode.

Output

EXTAL

Analog input of the oscillator amplifier circuit when

oscillator is not in bypass mode

Analog input for the clock generator when oscillator is

in bypass mode

Input

Table 4. System pins (continued)

Symbol

Description

Direction

QFP pin

100

Table 5. LVDSM pin descriptions

Functional

block

Port

Signal

Signal description

Direction

Package pin number

eTQFP80

eTQFP100

SIPI

LFAST(1)

PF[13]

SIPI_RXN

Interprocessor Bus LFAST,

LVDS Receive Negative

Terminal

I46

PD[7]

SIPI_RXP

Interprocessor Bus LFAST,

LVDS Receive Positive Terminal

I47

PD[6]

SIPI_TXN

Interprocessor Bus LFAST,

LVDS Transmit Negative

Terminal

O48

PA[8]

SIPI_TXP

Interprocessor Bus LFAST,

LVDS Transmit Positive

Terminal

O49

DSPI 4

Microsecond

Bus

PD[3]

SCK_N

DSPI 4 Microsecond Bus Serial

Clock, LVDS Negative Terminal

O69

PD[2]

SCK_P

DSPI 4 Microsecond Bus Serial

Clock, LVDS Positive Terminal

O70

PD[1]

SOUT_N

DSPI 4 Microsecond Bus Serial

Data, LVDS Negative Terminal

O71

PD[0]

SOUT_P

DSPI 4 Microsecond Bus Serial

Data, LVDS Positive Terminal

O72

1. DRCLK and TCK/DRCLK usage for SIPI LFAST is described in the SPC572Lx reference manual, refer to SIPI LFAST

chapter.

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