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STM8L051F3 bảng dữ liệu(PDF) 42 Page - STMicroelectronics

tên linh kiện STM8L051F3
Giải thích chi tiết về linh kiện  8-bit ultra-low-power MCU, 8-Kbyte Flash memory, 256-byte data EEPROM, RTC, timers, USART, I2C, SPI, ADC
PDF  96 Pages
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nhà sản xuất  STMICROELECTRONICS [STMicroelectronics]
Trang chủ  http://www.st.com
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STM8L051F3 bảng dữ liệu(HTML) 42 Page - STMicroelectronics

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Option bytes
STM8L051F3
42/96
DS9178 Rev 4
7
Option bytes
Option bytes contain configurations for device hardware features as well as the memory
protection of the device. They are stored in a dedicated memory block.
All option bytes can be modified in ICP mode (with SWIM) by accessing the EEPROM
address. See Table 10 for details on option byte addresses.
The option bytes can also be modified ‘on the fly’ by the application in IAP mode, except for
the ROP and UBCvalues which can only be taken into account when they are modified in
ICP mode (with the SWIM).
Refer to the How to program STM8L and STM8AL Flash program memory and data
EEPROM programming manual (PM0054) and the STM8 SWIM communication protocol
and debug module user manual (UM0470) for information on SWIM programming
procedures.
Table 10. Option byte addresses
Addr.
Option name
Option
byte
No.
Option bits
Factory
default
setting
7
6
5
4
3210
0x00 4800
Read-out
protection
(ROP)
OPT0
ROP[7:0]
0xAA
0x00 4802
UBC (User
Boot code size)
OPT1
UBC[7:0]
0x00
0x00 4807
Reserved
0x00
0x00 4808
Independent
watchdog
option
OPT3
[3:0]
Reserved
WWDG
_HALT
WWDG
_HW
IWDG
_HALT
IWDG
_HW
0x00
0x00 4809
Number of
stabilization
clock cycles for
HSE and LSE
oscillators
OPT4
Reserved
LSECNT[1:0]
HSECNT[1:0]
0x00
0x00 480A
Brownout reset
(BOR)
OPT5
[3:0]
Reserved
BOR_TH
BOR_
ON
0x00
0x00 480B
Bootloader
option bytes
(OPTBL)
OPTBL
[15:0]
OPTBL[15:0]
0x00
0x00 480C
0x00



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