AD4134 datasheet(14/92 Pages) AD

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Data Sheet

AD4134

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

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Figure 5. Pin Configuration

Table 8. Pin Function Descriptions

Pin No.

Mnemonic

Type1

Description

FORMAT0/CS

ADC Output Data Format Selection Input 0 in Pin Control Mode (FORMAT0). Tie this pin to IOVDD or to IOGND

to set the number of DOUTx pins used to output ADC conversion data. See the Output Channel Format section for

more details.

Chip Select Input in SPI Control Mode (CS).

FORMAT1/SCLK

ADC Output Data Format Selection Input 1 in Pin Control Mode (FORMAT1). Tie this pin to IOVDD or to IOGND

to set the number of DOUTx pins used to output ADC conversion data. See the Output Channel Format section for

more details.

Serial Clock Input in SPI Control Mode (SCLK).

DEC3/SDO

DI/O

Decimation Ratio Selection Input 3 in Pin Control Master Mode or Phase-Locked Loop (PLL) Lock Status Output

in Pin Control Slave Mode (DEC3). Tie this pin to IOVDD or to IOGND to set the output data rate. See the

Programming Output Data Rate and Clock section for more details. In pin control slave mode, this pin is output high

to indicate the internal PLL is in lock.

Serial Data Output in SPI Control Mode (SDO).

DEC2/SDI

Master Mode Decimation Ratio Selection Input 2 in Pin Control Master Mode (DEC2). Tie this pin to IOVDD or to

IOGND to set the output data rate. See the Programming Output Data Rate and Clock section for more details.

Serial Data Input in SPI Control Mode (SDI).

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