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MPC8560CPX667JC bảng dữ liệu(PDF) 10 Page - NXP Semiconductors

tên linh kiện MPC8560CPX667JC
Giải thích chi tiết về linh kiện  Integrated Processor Hardware Specifications
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MPC8560 Integrated Processor Hardware Specifications, Rev. 4.2
10
Freescale Semiconductor
Electrical Characteristics
NOTE
If the items on line 2 must precede items on line 1, please ensure that the
delay will not exceed 500 ms and the power sequence is not done greater
than once per day in production environment.
NOTE
From a system standpoint, if the I/O power supplies ramp prior to the VDD
core supply, the I/Os on the MPC8560 may drive a logic one or zero during
power-up.
2.1.3 Recommended Operating Conditions
Table 2 provides the recommended operating conditions for the MPC8560. Note that the values in Table 2
are the recommended and tested operating conditions. Proper device operation outside of these conditions
is not guaranteed.
Table 2. Recommended Operating Conditions
Characteristic
Symbol
Recommended
Value
Unit
Core supply voltage
For devices rated at 667 and 833 MHz
For devices rated at 1 GHz
VDD
1.2 V ± 60 mV
1.3 V ± 50 mV
V
PLL supply voltage
For devices rated at 667 and 833 MHz
For devices rated at 1 GHz
AVDD
1.2 V ± 60 mV
1.3 V ± 50 mV
V
DDR DRAM I/O voltage
GVDD
2.5 V ± 125 mV
V
Three-speed Ethernet I/O voltage
LVDD
3.3 V ± 165 mV
2.5 V ± 125 mV
V
CPM, PCI/PCI-X, local bus, RapidIO, 10/100 Ethernet, MII management,
DUART, system control and power management, I2C, and JTAG I/O voltage
OVDD
3.3 V ± 165 mV
V
Input voltage
DDR DRAM signals
MVIN
GND to GVDD
V
DDR DRAM reference
MVREF
GND to GVDD/2
V
Three-speed Ethernet signals
LVIN
GND to LVDD
V
CPM, PCI/PCI-X, local bus,
RapidIO, 10/100 Ethernet, MII
management, DUART, SYSCLK,
system control and power
management, I2C, and JTAG
signals
OVIN
GND to OVDD
V
Die-junction temperature
Tj
0 to 105
°C



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