MPC8560CPX667JC datasheet(19/108 Pages) NXP

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MPC8560 Integrated Processor Hardware Specifications, Rev. 4.2

Freescale Semiconductor

DDR SDRAM

6.2 DDR SDRAM AC Electrical Characteristics

This section provides the AC electrical characteristics for the DDR SDRAM interface.

6.2.1 DDR SDRAM Input AC Timing Specifications

Table 15 provides the input AC timing specifications for the DDR SDRAM interface.

Figure 4. DDR SDRAM Interface Input Timing

Table 15. DDR SDRAM Input AC Timing Specifications

At recommended operating conditions with GVDD of 2.5 V ± 5%.

Parameter

Symbol

Min

Max

Unit

Notes

AC input low voltage

VIL

—MVREF – 0.31

—

AC input high voltage

VIH

MVREF + 0.31

GVDD + 0.3

—

MDQS—MDQ/MECC input skew per byte

For DDR = 333 MHz

For DDR

≤ 266 MHz

tDISKEW

-750

-1125

750

1125

1, 2

Note:

1.Maximum possible skew between a data strobe (MDQS[n]) and any corresponding bit of data (MDQ[8n + {0...7}] if

≤ n ≤ 7) or ECC (MECC[{0...7}] if n=8).

2.For timing budget analysis, the MPC8560 consumes

±550 ps of the total budget.

MDQS[n]

MDQ[n]

tDISKEW

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