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DA9072

Ultra-Low Quiescent Current PMIC

Datasheet

Revision 3.0

14-Jun-2021

CFR0011-120-00

29 of 113

4.2

Battery-Powered Operation

Ship mode is an ultra-low leakage standby state that minimizes battery depletion while the product

sits on the shelf. Typical battery current in Ship mode is 5 nA.

There are two methods to enter Ship mode:

1. By register write:

a. Disconnect VDD_PWR

b. Set MODE pin high

c. Set EN_SHIPMODE bit (register 0x000D[0]) = 0x1

DA9072 enters Ship mode immediately. Note: If VDD_PWR is plugged in, Ship mode entry is

delayed until power is removed.

2. By pushbutton timer pin, RIN_N:

a. Disconnect VDD_PWR

b. Set MODE pin high

c. Enable RIN_N control of Ship mode: set RIN_N_RST_REC (register 0x0010 [1:0]) = 0x01

d. Pull RIN_N pin low for longer than the reset period, set by RIN_N_PER_RST (register

0x0010 [7:6])

The IC enters Ship mode when RIN_N is released (internally pulled up).

To exit Ship mode, apply VDD_PWR or toggle RIN_N low for longer than 50 ms. On waking from

Ship mode, all pre-programmed OTP values are loaded.

4.2.1

Active Battery and High Impedance Modes

Under battery power there are two modes of operation, both controlled by the MODE pin. A rising

edge on MODE puts DA9072 in Active Battery mode. In this mode, all functions are active.

Conversely, a falling edge on MODE puts DA9072 into Hi-Z mode, intended to be used during

system standby states with low power consumption.

In Hi-Z mode, the following communication functions are placed in a high impedance state to reduce

leakage from the battery:

● I2C interface

● SYS_FLT and PWR_FLT status outputs

● watchdog timer (WD)

All other functions and outputs remain active, with the exception of TSD.

CAUTION

The Thermal Shutdown function is not active in Hi-Z mode. Hi-Z mode should not be used in high power

dissipation or heavy load conditions.

Hi-Z mode can also be entered by setting the HZ_MODE bit (register 0x000D [1]) = 0x1; or by using

RIN_N pushbutton by setting RIN_N_RST_REC (register 0x0010 [1:0]) = 0x2 and pulling RIN_N low

for more than the RIN_N reset time (set by register RIN_N_PER_RST 0x0010 [7:6]).

DA9072 exits Hi-Z mode at a MODE pin rising edge or when VDD_PWR is applied. When

VDD_PWR is removed, DA9072 enters Active Battery mode regardless of the MODE pin state.

The behavior of the MODE pin depends on whether VDD_PWR is connected, shown in Table 21.

The MODE pin is internally pulled low.

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