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công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
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DA9072 bảng dữ liệu(PDF) 9 Page - Dialog Semiconductor |
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DA9072 bảng dữ liệu(HTML) 9 Page - Dialog Semiconductor |
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9 / 113 page  DA9072 Ultra-Low Quiescent Current PMIC Datasheet Revision 3.0 14-Jun-2021 CFR0011-120-00 9 of 113 © 2021 Dialog Semiconductor 1 Pinout LDO1 Reset/Timer Control Temp Sense Common Buck Charger/Power Path LDO2 LDO0 7 6 5 4 3 A B C D E F PGND_B UCK FB_BUC K VDD_BU CK VDD_SY S GND VDD_SY S VBAT_DI V VLDO2 SW_BU CK VDD_DL O0 VLDO0 VLDO1 SDA AGND SLC ROUT_N PWR_FL T VDD_LD O1 VDD_LD O2 RIN_N MODE TEMP_S NS SYS_FL T WD IMON ILIM_CH G GND VDDIO GND_DI V GND 2 GND VDD_P WR VBAT ITER_C HG ILIM_PW R VTEMP 1 NC GND VBAT VBAT_S NS VDD_SY S GND Figure 2: Pinout Diagram (Bottom View) Note 1 Although Pin D1 is connected to VDD_SYS, it does not handle any current. Therefore, it does not need to be routed by large current rule. Table 1: Pin Description Pin # Pin Name Type (Table 2) Description A1, D3, E1, F2, F3, F4 GND GND Ground connection. Connect to the ground plane. A2 VDD_PWR POWER Input power supply. VDD_PWR is a 20 V-tolerant input. Bypass to GND with a minimum 1 µF ceramic capacitor. A3, A4, D1 VDD_SYS POWER VDD_SYS is the intermediate rail which typically supplies VDD_BUCK. Bypass to ground with a 4.7 µF ceramic capacitor. A5 VDD_BUCK POWER Input of the buck converter. Bypass to PGND_BUCK with a minimum 2.2 µF ceramic capacitor. A6 SW_BUCK POWER Buck switching node. Connect to the buck inductor. A7 PGND_BUCK POWER Power ground for the buck. Connect to the buck input capacitor and ground plane. |
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