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M69KB096AB bảng dữ liệu(PDF) 41 Page - STMicroelectronics |
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M69KB096AB bảng dữ liệu(HTML) 41 Page - STMicroelectronics |
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41 / 73 page ![]() M69KB096AB 9 DC and AC parameters 41/73 Table 17. Asynchronous Read AC Characteristics Table 18. Asynchronous Page Read AC Characteristics Symbol Alt. Parameter(1) 1. These timings have been obtained in the measurement conditions described in Table 14: Operating and AC Measurement Conditions and Figure 13: AC Measurement Load Circuit. Min Max Unit tAVQV tAA Address Valid to Output Valid 70 ns tLLQV tAADV Latch Enable Low to Output Valid 70 ns tLHAX tLHRL tAVH Latch Enable High to Address Transition Latch Enable High to Configuration Register Low 2ns tAVLH tRHLH tAVS Address Valid to L High Configuration Register High to L High 5ns tBLQV tBA Upper/Lower Byte Enable Low to Output Valid 70 ns tBHQZ (2) 2. The Hi-Z timings measure a 100mV transition from either VOH or VOL to VCCQ/2. tBHZ Upper/Lower Byte Enable High to Output Hi-Z 8 ns tBLQX (3) 3. The Low-Z timings measure a 100mV transition from the Hi-Z (VCCQ/2) level to either VOH or VOL. tBLZ Upper/Lower Byte Enable Low to Output Transition 10 ns tELTV tCEW Chip Enable Low to WAIT Valid 1 7.5 ns tELQV tCO Chip Enable Low to Output Valid 70 ns tELLH tCVS Chip Enable Low to L High 7 ns tEHEL tCPH Chip Enable High between Subsequent Asynchronous Operations 5ns tEHQZ (2) tHZ Output Enable High to Output Hi-Z Chip Enable High to Output Hi-Z 8ns tELQX (3) tLZ Chip Enable Low to Output Transition 10 ns tGLQV tOE Output Enable Low to Output Valid 20 ns tGHQZ (2) tOHZ Output Enable Low to Output Hi-Z 8 ns tGLQX (3) tOLZ Output Enable Low to Output Transition 3 ns tAVAX tRC Read Cycle Time 70 ns tLLLH tVP Latch Enable Low Pulse Width 5 ns Symbol Alt. Parameter(1) 1. These timings have been obtained in the measurement conditions described in Figure 14: Operating and AC Measurement Conditions and Figure 13: AC Measurement Load Circuit. Min Max Unit tAVQV1 tAPA Page Access Time 20 ns tAVAV tPC Page Cycle Time 20 ns tELEH tCEM Maximum Chip Enable Pulse Width 4 µs tAVQX tOH Data Hold from Address Change 5 ns |
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