M69KB096AB datasheet(52/73 Pages) STMICROELECTRONICS

52 / 73 page

9 DC and AC parameters

M69KB096AB

52/73

Table 20.

Clock Related AC Timings

Table 21.

Synchronous Burst Read AC Characteristics

Symbol

Alt.

Parameter

104MHz

80MHz

Unit

Min

Max

Min

Max

fCLk

Clock frequency

104

MHz

tKHKH

tCLK

Clock Period

9.62

12.5

tKHKL

Clock Rise Time

Clock Fall Time

1.6

1.8

tKHKL

tKLKH

tKP

Clock High to Clock Low

Clock Low to Clock High

Symbol

Alt.

Parameter(1)

104MHz

80MHz

Unit

Min

Max

Min

Max

tAVQV

tAA

Address Valid to Output Valid (Fixed Latency)

tLLQV

tAADV Latch Enable Low to Output Valid (Fixed Latency)

tKHQV1

tABA

Burst to Read Access Time (Variable Latency)

tKHQV2

tACLK Clock High to Output Delay

tGLQV

tBOE

Delay From Output Enable Low to Output Valid in

Burst mode

tEHEL

(2)

tCBPH

Chip Enable High between Subsequent Operations

in Full-Synchronous or NOR-Flash mode.

tELEH

(2)

tCEM

Chip Enable Pulse Width

µs

tELTV

tLLTV

tCEW

Chip Enable Low to WAIT Valid

Latch Enable Low to WAIT Valid

7.5

tELQV

tCO

Chip Enable Low to Output Valid

tELKH

tCSP

Chip Enable Low to Clock High

tKHAX

tKHBH

tKHWL

tKHEH

tKHLH

tKHQX

tHD

Hold Time From Active Clock Edge

tEHQZ

tEHTZ

(3)

tHZ

Chip Enable High to Output Hi-Z or WAIT Hi-Z

tKHTX

tKHTV

tKHTL Clock High to WAIT Valid

tGHQZ

(3)

tOHZ

Output Enable High to Output Hi-Z

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