68HC705JB4 datasheet(56/134 Pages) FREESCALE

56 / 134 page

GENERAL RELEASE SPECIFICATION

February 24, 1999

MOTOROLA

MULTI-FUNCTION TIMER

MC68HC05JB4

8-4

REV 2

RTIF - Real Time Interrupt Flag

The RTIF is a read-only ﬂag bit.

1 =

Set when the output of the chosen (1 of 4 selections) Real Time

Interrupt stage goes active. A TIMER Interrupt request will be

generated if RTIE is also set.

0 =

Reset by writing a logical one to the RTIF acknowledge bit, RTIFR.

Writing to the RTIF ﬂag bit has no effect on its value. This bit is

cleared by reset.

TOFE - Timer Overﬂow Enable

The TOFE is an enable bit that allows generation of a TIMER Interrupt upon

overﬂow of the Timer Counter Register.

1 =

When set, the TIMER Interrupt is generated when the TOF ﬂag bit is

set.

0 =

When cleared, no TIMER interrupt caused by TOF bit set will be

generated. This bit is cleared by reset.

RTIE - Real Time Interrupt Enable

The RTIE is an enable bit that allows generation of a TIMER Interrupt by the

RTIF bit.

1 =

When set, the TIMER Interrupt is generated when the RTIF ﬂag bit is

set.

0 =

When cleared, no TIMER interrupt caused by RTIF bit set will be

generated. This bit is cleared by reset.

TOFR - Timer Overﬂow Acknowledge

The TOFR is an acknowledge bit that resets the TOF ﬂag bit. This bit is unaf-

fected by reset. Reading the TOFR will always return a logical zero.

1 =

Clears the TOF ﬂag bit.

0 =

Does not clear the TOF ﬂag bit.

RTIFR - Real Time Interrupt Acknowledge

The RTIFR is an acknowledge bit that resets the RTIF ﬂag bit. This bit is unaf-

fected by reset. Reading the RTIFR will always return a logical zero.

1 =

Clears the RTIF ﬂag bit.

0 =

Does not clear the RTIF ﬂag bit.

8.4

OPERATION DURING STOP MODE

When STOP is exited by an external interrupt or an LVR reset or an external

RESET, the internal oscillator will resume, followed by a 128 or 4064 internal pro-

cessor oscillator stabilization delay.

8.5

COP CONSIDERATION DURING STOP MODE

In STOP mode, the clock to the Watchdog Timer is stopped and is therefore

impossible to generate COP reset when in STOP mode. The COP function will

resume 128 or 4064 cycles after exiting from STOP.

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

68HC705JB4 bảng dữ liệu(PDF) 56 Page - Freescale Semiconductor, Inc

68HC705JB4 bảng dữ liệu(HTML) 56 Page - Freescale Semiconductor, Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

bảng dữ liệu tải về

Link URL