EKTF6708 datasheet(128/158 Pages) EMC

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eKTF6708

8-Bit Microcontroller

118



IC Product Specification (V1.2) 03.12.2020

(This specification is subject to change without prior notice)

Communications between the Master-transmitter/receiver and Slave- transmitter/receiver

are illustrated in the following Figures 6-13a and 6-13b.

Slave Address

R//W

A//A

Data

'0'

Write

data transferred

(n byte + acknowledge)

Master to Slave

Slave to Master

A = acknowledge (SDA low)

/A = not acknowledge (SDA high)

S = Start

P = Stop

7 Bits

8 Bits

Figure 6-13a Master-Transmitter Transmits to Slave-Receiver with 7-Bit Slave Address

Slave Address

R//W

Data

'1' Read

data transferred

(n byte + acknowledge)

7 Bits

8 Bits

Figure 6-13b Master-Receiver Reads from Slave-Transmitter with 7-Bit Slave Address

6.12.2 10-Bit Slave Address

In 10-Bit Slave address mode, using 10-bit for addressing exploits the reserved

combination 11110XX for the first seven bits of the first byte following a START(S) or

repeated START (Sr) condition. The first seven bits of the first byte are the combination

11110XX of which the last two bits (XX) are the two most-significant bits of the 10-bit

address. If the R//W bit is

“0”, the second byte after acknowledge would be the eighth

address bit of 10-bits Slave address. Otherwise, the second byte would just be the next

transmitted data from a Slave to Master device. The first byte 11110XX is transmitted by

using the Slave address register (I2CSA), and the second byte XXXXXXXX is transmitted

by using the data buffer (I2CDB).

The possible data transfer formats for 10-bit Slave address mode are explained in the

following paragraphs and Figures 6-14a ~ 6-14e.

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