EKTF6708 datasheet(45/158 Pages) EMC

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eKTF6708

8-Bit Microcontroller

IC Product Specification (V1.2) 03.12.2020

 35

(This specification is subject to change without prior notice)

Bit 4 (SSE):

SPI Shift Enable bit

0: Reset as soon as the shifting is completed, and the next byte is read to

shift.

1: Start to shift, and it remains at "1" while the current byte is still being

transmitted.

Bit 3 (SDOC): SDO Output Status Control bit

0: After serial data output, the SDO remains high

1: After serial data output, the SDO remains low

Bits 2~0 (SBRS2~SBRS0): SPI Baud Rate Select bits

SBRS2

SBRS1

SBRS0

Mode

SPI Baud Rate

Master

Fosc/2

Master

Fosc/4

Master

Fosc/8

Master

Fosc/16

Master

Fosc/32

Master

Fosc/64

Slave

/SS enable

Slave

/SS disable

6.1.43 Bank 0 R37: SPIS (SPI Status Register)

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

DORD

TD1

TD0

OD3

OD4

RBF

R/W

Bit 7 (DORD): Data shift type control bit

0: Shift left (MSB first)

1: Shift right (LSB first)

Bits 6~5 (TD1~TD0): SDO status output delay time options (Normal mode only). When

the CPU oscillator source uses Fs, it will result in 1 CLK delay time.

NOTE

TD1~TD0 bits are applicable only to Normal mode

 Normal mode. If under Sleep mode 

Normal mode condition, then Wake-up time is

“Warm up time + 1CLK”.

TD1

TD0

Delay Time

8 CLK

16 CLK

24 CLK

32 CLK

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