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EKTF6708 bảng dữ liệu(PDF) 44 Page - ELAN Microelectronics Corp

tên linh kiện EKTF6708
Giải thích chi tiết về linh kiện  8-Bit Microcontroller
PDF  158 Pages
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nhà sản xuất  EMC [ELAN Microelectronics Corp]
Trang chủ  http://www.emc.com.tw
Logo EMC - ELAN Microelectronics Corp

EKTF6708 bảng dữ liệu(HTML) 44 Page - ELAN Microelectronics Corp

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eKTF6708
8-Bit Microcontroller
34
IC Product Specification (V1.2) 03.12.2020
(This specification is subject to change without prior notice)
6.1.40 Bank 0 R34: I2CDAL (I2C Device Address Register)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
DA7
DA6
DA5
DA4
DA3
DA2
DA1
DA0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Bits 7~0 (DA7~DA0): When the MCU is used as Slave device for I
2C application, this
register stores the MCU address. It is used to identify the data on the I
2C
bus to extract the message delivered to the MCU.
NOTE
Slave Address 0x77 is reserved for WTR use.
6.1.41 Bank 0 R35: I2CDAH (I2C Device Address Register)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
-
-
-
-
-
-
DA9
DA8
-
-
-
-
-
-
R/W
R/W
Bits 7~2:
Not used. Set to "0" all the time.
Bits 1~0 (DA9~DA8): Device Address bits
6.1.42 Bank 0 R36: SPICR (SPI Control Register)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
CES
SPIE
SRO
SSE
SDOC
SBRS2
SBRS1
SBRS0
R/W
R/W
R
R/W
R/W
R/W
R/W
R/W
Bit 7 (CES):
Clock Edge Select bit
0: Data shift out on a rising edge, and shift in on a falling edge. Data is on
hold during a low-level.
1: Data shift out on a falling edge, and shift in on a rising edge. Data is on
hold during a high-level.
Bit 6 (SPIE): SPI Enable bit
0: Disable SPI mode
1: Enable SPI mode
Bit 5 (SRO):
SPI Read Overflow bit
0: No overflow
1: A new data is received while the previous data is still being held in the
SPIR register. Under this condition, the data in the SPIS register is
destroyed. To avoid setting this bit, user should read the SPIR register
although only transmission is implemented. This can only occur in
Slave mode.



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