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EKTF6708 bảng dữ liệu(PDF) 58 Page - ELAN Microelectronics Corp |
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EKTF6708 bảng dữ liệu(HTML) 58 Page - ELAN Microelectronics Corp |
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58 / 158 page ![]() eKTF6708 8-Bit Microcontroller 48 IC Product Specification (V1.2) 03.12.2020 (This specification is subject to change without prior notice) 6.1.82 Bank 1 R21: DTBL (Low Byte of PMWB Duty) Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 DTB7 DTB6 DTB5 DTB4 DTB3 DTB2 DTB1 DTB0 R/W R/W R/W R/W R/W R/W R/W R/W Bits 7~0 (DTB7~0): The contents of the register are low byte of the PWMB duty 6.1.83 Bank 1 R22: DTBH (High Byte of PMWB Duty) Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 DTB15 DTB14 DTB13 DTB12 DTB11 DTB10 DTB9 DTB8 R/W R/W R/W R/W R/W R/W R/W R/W Bits 7~0 (DTB15~8): The contents of the register are high byte of the PWMB duty 6.1.84 Bank 1 R23: TMRBL (Low Byte of Timer B) Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 TMRB7 TMRB6 TMRB5 TMRB4 TMRB3 TMRB2 TMRB1 TMRB0 R R R R R R R R Bits 7~0 (TMRB7~0): The contents of the register are low byte of the PWMB timer which is counting. This is read-only 6.1.85 Bank 1 R24: TMRBH (High Byte of Timer B) Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 TMRB15 TMRB14 TMRB13 TMRB12 TMRB11 TMRB10 TMRB9 TMRB8 R R R R R R R R Bits 7~0 (TMRB15~8): The contents of the register are high byte of the PWMB timer which is counting. This is read-only 6.1.86 Bank 1 R25: PWMCCR (PWMC Control Register) Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 PWMCE - - - TCEN TCP2 TCP1 TCP0 R/W - - - R/W R/W R/W R/W Bit 7 (PWMCE): PWMC enable bit 0: Disable (default) 1: Enable. The compound pin is used as PWMC pin Bits 6~4: Not used, set to "0" all the time. Bit 3 (TCEN): TMRC enable bit. All PWM function is valid only when this bit is set 0: TMRC is off (default value) 1: TMRC is on |
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