CS47L24 datasheet(7/256 Pages) CIRRUS

7 / 256 page

CS47L24

Rev 4.1

PIN DESCRIPTION

A description of each pin on the CS47L24 is provided below.

Note that a table detailing the associated power domain for every input and output pin is provided on the following page.

Note that, where multiple pins share a common name, these pins should be tied together on the PCB.

All Digital Output pins are CMOS outputs, unless otherwise stated.

PIN NO

NAME

TYPE

DESCRIPTION

AGND

Supply

Analogue ground (Return path for AVDD and MICVDD)

AIF1BCLK

Digital Input / Output

Audio interface 1 bit clock

AIF1LRCLK

Digital Input / Output

Audio interface 1 left / right clock

AIF1RXDAT

Digital Input

Audio interface 1 RX digital audio data

AIF1TXDAT

Digital Output

Audio interface 1 TX digital audio data

AIF2BCLK

Digital Input / Output

Audio interface 2 bit clock

AIF2LRCLK

Digital Input / Output

Audio interface 2 left / right clock

AIF2RXDAT

Digital Input

Audio interface 2 RX digital audio data

AIF2TXDAT

Digital Output

Audio interface 2 TX digital audio data

AIF3BCLK

Digital Input / Output

Audio interface 3 bit clock

AIF3LRCLK

Digital Input / Output

Audio interface 3 left / right clock

AIF3RXDAT

Digital Input

Audio interface 3 RX digital audio data

AIF3TXDAT

Digital Output

Audio interface 3 TX digital audio data

AVDD

Supply

Analogue supply

CIFMISO

Digital Output

Control interface Master In Slave Out.

The pin configuration is selectable CMOS or ‘Wired OR’.

CIFMOSI

Digital Input

Control interface Master Out Slave In data.

CIFSCLK

Digital Input

Control interface clock input

CIFSS

¯¯¯¯¯

Digital Input

Control interface Slave Select (SS)

CPC1A

Analogue Output

Charge pump fly-back capacitor 1 pin

CPC1B

Analogue Output

Charge pump fly-back capacitor 1 pin

CPC2A

Analogue Output

Charge pump fly-back capacitor 2 pin

CPC2B

Analogue Output

Charge pump fly-back capacitor 2 pin

CPGND

Supply

Charge pump ground (Return path for CPVDD)

A6, E6

CPVDD

Supply

Supply for Charge Pump

CPVOUT1N

Analogue Output

Charge pump negative output 1 decoupling pin

CPVOUT1P

Analogue Output

Charge pump positive output 1 decoupling pin

CPVOUT2N

Analogue Output

Charge pump negative output 2 decoupling pin

CPVOUT2P

Analogue Output

Charge pump positive output 2 decoupling pin

DBVDD

Supply

Digital buffer (I/O) supply

DCVDD

Supply

Digital core supply

M9, P1

DGND

Supply

Digital ground (Return path for DCVDD and DBVDD)

DMICCLK1

Digital Output

Digital MIC clock output 1

DMICCLK2

Digital Output

Digital MIC clock output 2

DMICDAT1

Digital Input

Digital MIC data input 1

DMICDAT2

Digital Input

Digital MIC data input 2

GPIO1

Digital Input / Output

General Purpose pin GPIO1.

The output configuration is selectable CMOS or Open Drain.

GPIO2

Digital Input / Output

General Purpose pin GPIO2.

The output configuration is selectable CMOS or Open Drain.

HPOUTFB

Analogue Input

HPOUTL and HPOUTR ground feedback pin

HPOUTL

Analogue Output

Left headphone output

HPOUTR

Analogue Output

Right headphone output

IRQ

¯¯¯

Digital Output

Interrupt Request (IRQ) output (default is active low).

The pin configuration is selectable CMOS or Open Drain.

MCLK1

Digital Input

Master clock 1

MCLK2

Digital Input

Master clock 2

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