GS3471 datasheet(63/179 Pages) SEMTECH

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GS3471

Final Data Sheet Rev.4

PDS-060498

September 2017

63 of 179

Semtech

www.semtech.com

4.19 Ancillary Data Detection & Indication

The GS3471 detects ancillary data in both the vertical and horizontal ancillary data

spaces. The status signal outputs Y/1ANC and C/2ANC are provided to indicate the

position of ancillary data in the output data streams. These signals may be selected for

output on the multi-function I/O port pins (STAT[5:0]).

The GS3471 indicates the presence of all types of ancillary data by detecting the 000h,

3FFh, 3FFh (00h, FFh, FFh for 8-bit video) ancillary data preamble.

By default (at power up or after system reset) the GS3471 indicates all types of ancillary

data. Up to 5 types of ancillary data can be specifically programmed for recognition.

For HD video signals, ancillary data may be placed in both the Y and Cb/Cr video data

streams separately. For SD video signals, the ancillary data is multiplexed and combined

into the YCbCr data space.

For 3G signals, ancillary data may exist in either or both of the virtual interface data

streams. Both data streams are examined for ancillary data.

For a 3G data stream formatted as per Level A mapping:

•

The ancillary data is placed in Data Stream 1 first, with overflow into Data Stream 2

•

SMPTE ST 352 packets are duplicated in both data streams

For a 3G data stream formatted as per Level B mapping:

•

Each multiplexed data stream forming the 3G signal contains ancillary data

embedded according to SMPTE ST 291

•

Each multiplexed data stream forming the 3G signal contains SMPTE ST 352 packets

embedded according to SMPTE ST 425

For Y/1ANC and C/2ANC assertion and de-assertion while operating in SD, HD and 3G

Level A, please refer to Figure 4-35: Y/1ANC and C/2ANC Signal Timing.

When detecting ancillary data in 3G Level B data, the Y/1ANC status output is HIGH

when Data Stream 1 ancillary data is detected on either Y or C channels and the C/2ANC

status output is HIGH whenever Data Stream 2 ancillary data is detected on either Y or

C channels.

These status signal outputs are synchronous with PCLK and may be used as

clock-enables for external logic, or as write-enables for an external FIFO or other

memory devices.

Note 1: When I/O processing is disabled, the Y/1ANC and C/2ANC flags may toggle, but

they are invalid and should be ignored.

Note 2: For 3G Level B 20-bit data, the Y/1ANC flag identifies all ANC data on Data

Stream 1 (Link A), whether it is embedded in the Y or C component – ANC data is not

identified separately for each component. Similarly, the C/2ANC flag identifies all ANC

data on Data Stream 2 (Link B), whether it is embedded in the Y or C component.

Note 3: For 3G level B 10-bit data, the Y/1 ANC flag and C/2 ANC flag outputs are

dependent on the setting of ANC_EXT_SEL_DS2_DS1 and

ANC_EXT_SEL_DS1_Y_DS2_Y as shown in Figure 4-37.

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