GS3471 datasheet(31/179 Pages) SEMTECH

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GS3471

Final Data Sheet Rev.4

PDS-060498

September 2017

31 of 179

Semtech

www.semtech.com

Table 4-4 provides a summary of all the options available for the serial digital output.

The DDO, DDO differential signal is capable of driving a Semtech Cable Driver through

at least 150mm of 100Ω differential FR4 trace, such that the Cable Driver output

conforms to the relevant SMPTE specification for the data rate, with the exception of the

jitter specifications.

The output can be DC-coupled into Semtech Cable Drivers that support 1.2V, 1.8V and

2.5V inputs.

The output buffer may be disabled to achieve power savings. This can be done using the

SERIAL_LOOPBACK_EN bit through the GSPI interface.

4.8 Serial Digital Retimer

The retimer operates at three frequencies: 2.97Gb/s, 1.485Gb/s, and 270Mb/s.

Note: The SD/HD bit takes precedence over the 3G/HD bit, so if the SD/HD bit is HIGH,

the 3G/HD bit is ignored.

The retimer can automatically determine the supported rate based on the input signal,

or the rate can be set manually. For more detail on these modes, please refer to

Section 4.4.1.

4.9 External Crystal/Reference Clock

The GS3471 requires an external 27MHz reference clock for correct operation. This

reference clock is generated by connecting a crystal to the XTAL and XTAL pins of the

device. Refer to Typical Application Circuit.

A crystal with a maximum frequency variation of ±100ppm and a maximum equivalent

resistance of 50Ω should be selected.The external crystal is used in the frequency

acquisition process. It has no impact on the output jitter performance of the device

when the device is locked to incoming data.

Alternately, a 27MHz external clock source can be connected to the XTAL pin of the

device. It is recommended to DC-couple the reference clock input and to ensure the

reference clock does not exceed 1.2V.

Table 4-4: Serial Digital Output

SERIAL_LOOPBACK_EN

RC_BYP

DDO/DDO

Disabled

Re-timed

Buffered (not Re-timed)

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