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MMPF0200 bảng dữ liệu(PDF) 48 Page - NXP Semiconductors

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Giải thích chi tiết về linh kiện  12 channel configurable power management integrated circuit
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MMPF0200 bảng dữ liệu(HTML) 48 Page - NXP Semiconductors

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NXP Semiconductors
PF0200
FUNCTIONAL BLOCK REQUIREMENTS AND BEHAVIORS
Figure 14. SW2 efficiency waveforms
6.4.4.5
SW3A/B
SW3A/B are 1.25 to 2.5 A rated buck regulators, depending on the configuration. Table 28 describes the available switching modes and
Table 29 show the actual configuration options for the SW3xMODE[3:0] bits.
SW3A/B can be configured in various phasing schemes, depending on the desired cost/performance trade-offs. The following
configurations are available:
• A single phase
• Independent regulators
The desired configuration is programmed in OTP by using the SW3_CONFIG[1:0] bits.Table 57 shows the options for the SW3CFG[1:0]
bits.
SW3A/B single phase
In this configuration, SW3ALX and SW3BLX are connected in single phase with a single inductor a shown in Figure 15. This configuration
reduces cost and component count. Feedback is taken from the SW3AFB pin and the SW3BFB pin must be left open. Although control
is from SW3A, registers of both regulators, SW3A and SW3B, must be identically set.
Table 57. SW3 Configuration
SW3_CONFIG[1:0]
Description
00
A/B Single Phase
01
A/B Single Phase
10
Reserved
11
A/B Independent
0
10
20
30
40
50
60
70
80
90
100
0.1
1
10
100
1000
Ef
fi
ci
e
n
cy
(%
)
Load Current (mA)
PFM - Vout = 3.15V
APS - Vout = 3.15V
PWM - Vout = 3.15V



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