MMPF0200 datasheet(35/114 Pages) NXP

35 / 114 page

NXP Semiconductors

PF0200

FUNCTIONAL BLOCK REQUIREMENTS AND BEHAVIORS

Programmable maximum current

The maximum current, ISWxMAX, of each buck regulator is programmable. This allows the use of smaller inductors where lower currents

are required. Programmability is accomplished by choosing the number of paralleled power stages in each regulator. The

SWx_PWRSTG[2:0] bits on the Extended page 2 of the register map control the number of power stages. See Table 37 for the

programmable options. Bit[0] must always be enabled to ensure the stage with the current sensor is chosen. The default setting,

SWx_PWRSTG[2:0] = 111, represents the highest maximum current. The current limit for each option is also scaled by the percentage

of power stages that are enabled.

Table 35. Optimum phasing

Frequencies

Optimum phasing

1.0 MHz

2.0 MHz

0 °

180 °

1.0 MHz

4.0 MHz

0 °

180 °

2.0 MHz

4.0 MHz

0 °

180 °

1.0 MHz

2.0 MHz

4.0 MHz

0 °

90 °

Table 36. Regulator frequency configuration

SWxFREQ[1:0]

Frequency

1.0 MHz

2.0 MHz

4.0 MHz

Reserved

Table 37. Programmable current configuration

Regulators

Control bits

% of power stages enabled

Rated current (A)

SW1AB

SW1AB_PWRSTG[2:0]

ISW1ABMAX

40%

1.0

80%

2.0

60%

1.5

100%

2.5

SW2

SW2_PWRSTG[2:0]

ISW2MAX

38%

0.55

75%

1.125

63%

0.95

100%

1.5

SW3A

SW3A_PWRSTG[2:0]

ISW3AMAX

40%

0.5

80%

1.0

60%

0.75

100%

1.25

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