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ADAU1977WBCPZ-R7 bảng dữ liệu(PDF) 36 Page - Analog Devices |
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ADAU1977WBCPZ-R7 bảng dữ liệu(HTML) 36 Page - Analog Devices |
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36 / 68 page  ADAU1977 Data Sheet Rev. C | Page 36 of 68 REGISTER SUMMARY Table 25 is the control register summary. The registers can be accessed using the I2C control port or the SPI control port. Table 25. ADAU1977 Register Summary Reg Name Bits Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Reset RW 0x00 M_POWER [7:0] S_RST RESERVED PWUP 0x00 RW 0x01 PLL_CONTROL [7:0] PLL_LOCK PLL_MUTE RESERVED CLK_S RESERVED MCS 0x41 RW 0x02 BST_CONTROL [7:0] BST_GOOD FS_RATE BOOST_SW_ FREQ OV_EN BOOST_OV OC_EN BOOST_OC 0x4A RW 0x03 MB_BST_CONTROL [7:0] MB_VOLTS MB_EN BOOST_EN MRCV BOOST_RCVR 0x7D RW 0x04 BLOCK_POWER_SAI [7:0] LR_POL BCLKEDGE LDO_EN VREF_EN ADC_EN4 ADC_EN3 ADC_EN2 ADC_EN1 0x3F RW 0x05 SAI_CTRL0 [7:0] SDATA_FMT SAI FS 0x02 RW 0x06 SAI_CTRL1 [7:0] SDATA_SEL SLOT_WIDTH DATA_WIDTH LR_MODE SAI_MSB BCLKRATE SAI_MS 0x00 RW 0x07 SAI_CMAP12 [7:0] CMAP_C2 CMAP_C1 0x10 RW 0x08 SAI_CMAP34 [7:0] CMAP_C4 CMAP_C3 0x32 RW 0x09 SAI_OVERTEMP [7:0] SAI_DRV_C4 SAI_DRV_C3 SAI_DRV_C2 SAI_DRV_C1 DRV_HIZ OT_MCRV OT_RCVR OT 0xF0 RW 0x0A POSTADC_GAIN1 [7:0] PADC_GAIN1 0xA0 RW 0x0B POSTADC_GAIN2 [7:0] PADC_GAIN2 0xA0 RW 0x0C POSTADC_GAIN3 [7:0] PADC_GAIN3 0xA0 RW 0x0D POSTADC_GAIN4 [7:0] PADC_GAIN4 0xA0 RW 0x0E MISC_CONTROL [7:0] SUM_MODE RESERVED MMUTE RESERVED DC_CAL 0x02 RW 0x10 DIAG_CONTROL [7:0] RESERVED DIAG_EN4 DIAG_EN3 DIAG_EN2 DIAG_EN1 0x0F RW 0x11 DIAG_STATUS1 [7:0] RESERVED MIC_SHORT1 MICH_OPEN1 MICH_SB1 MICH_SG1 MICH_SMB1 MICL_SB1 MICL_SG1 0x00 RW 0x12 DIAG_STATUS2 [7:0] RESERVED MIC_SHORT2 MIC_OPEN2 MICH_SB2 MICH_SG2 MICH_SMB2 MICL_SB2 MICL_SG2 0x00 RW 0x13 DIAG_STATUS3 [7:0] RESERVED MIC_SHORT3 MIC_OPEN3 MICH_SB3 MICH_SG3 MICH_SMB3 MICL_SB3 MICL_SG3 0x00 RW 0x14 DIAG_STATUS4 [7:0] RESERVED MIC_SHORT4 MIC_OPEN4 MICH_SB4 MICH_SG4 MICH_SMB4 MICL_SB4 MICL_SG4 0x00 RW 0x15 DIAG_IRQ1 [7:0] RESERVED IRQ_RESET IRQ_DRIVE IRQ_POL DIAG_MASK4 DIAG_MASK3 DIAG_MASK2 DIAG_MASK1 0x20 RW 0x16 DIAG_IRQ2 [7:0] BST_FAULT_ MASK MIC_SHORT_ MASK MIC_OPEN_ MASK MICH_SB_ MASK MICH_SG_ MASK RESERVED MICL_SB_ MASK MICL_SG_ MASK 0x00 RW 0x17 DIAG_ADJUST1 [7:0] SHT_T_TRIP SHT_M_TRIP SHT_G_TRIP SHT_B_TRIP 0x00 RW 0x18 DIAG_ADJUST2 [7:0] RESERVED FAULT_TO RESERVED HYST_SM_EN HYST_SG_EN HYST_SB_EN 0x20 RW 0x19 ASDC_CLIP [7:0] RESERVED ADC_CLIP4 ADC_CLIP3 ADC_CLIP2 ADC_CLIP1 0x00 RW 0x1A DC_HPF_CAL [7:0] DC_SUB_C4 DC_SUB_C3 DC_SUB_C2 DC_SUB_C1 DC_HPF_C4 DC_HPF_C3 DC_HPF_C2 DC_HPF_C1 0x00 RW |
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