Document Number: 002-16951 Rev. *F

Page 14 of 37

EZ-PD™ CCG3PA Datasheet

Figure 8 shows the application diagram of CCG3PA based power adapter with Direct Feedback control. In this application, VBUS is

maintained at a constant voltage. The default value of VBUS upon power up (which is usually at 5 V) is set up by choosing the

appropriate resistor divider that will set the FB node at a voltage expected by the secondary controller.

Feedback node is regulated using internal IDACs. Whenever a change in VBUS voltage is needed, CCG3PA will either source or sink

a proportional current at feedback node, based on the amount of voltage change needed.

Figure 8. CCG3PA Based Power Adapter Application Diagram with Direct Feedback Control

PFET Load Switch

VBUS

CYPD3175-24LQXQ

VDDD

23

VCCD

24

CC1

CC2

VBUS_C_MON_

DISCHARGE

11

15

14

CATH/

COMP

21

3

VBUS_P_CTRL

22

GND

19

CSP

18

VBUS_IN_DIS

CHARGE

SWD_

DAT_0

7

AXRES/GPIO

9

DP0

DM0

17

16

Type-C

Receptacle

GND

FB

20

VBUS

CC1

CC2

DP0

DM0

SWD_

CLK_0

8

Secondary

Or

Integrated

Controller

SR

FB

GPIO

1, 2, 5, 6,

10, 12, 13,

VBUS_C_CTRL

4

5 m



1

F

1

F

100 nF

100 nF

50 k



R1

R2

To Programming Header (Not needed for final production)

Select R1, R2 to get

the expected FB

voltage at 5V VBUS

390 pF

5%

X7R

390 pF

5%

X7R