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ATPL00B bảng dữ liệu(PDF) 53 Page - ATMEL Corporation

tên linh kiện ATPL00B
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Atmel ATPL00B [datasheet]
43028A-ATPL - 9/12
53
Table 5-1.
Timer 2 operating modes
Mode
T2CON(5)
OR
T2CON(4)
CP/RL2
T2OE
Auto-reload
0
0
0
Programmable
clock-out
0
0
1
Capture
0
1
0
stopped
0
1
1
Baud Rate
generator
1
X
X
Timer 2 operation is similar to timer 0 and timer 1. C/T2 selects between timer operation mode (internal clock input) or
counter operation mode (external pin T2 as the time register input). Setting TR2 allows TL2 to be incremented by the
selected input.
The timer 2 related interrupt flags (TF2, EXF2) can be configured to be cleared by hardware when the interrupt routine
is vectored to, or by user software using TF2SC and EXF2SC.
The operating modes are described in the following paragraphs.
5.2.2
Capture mode
In the capture mode, timer 2 operates as a 16-bit timer or counter. An overflow condition sets bit TF2, which can be
used to request an interrupt. Setting the external enable bit EXEN2 allows the RCAP2H and RCAP2L registers to
capture the current value in timer registers TH2 and TL2 in response to a 1-to-0 transition at external input T2EX. The
transition at T2EX also sets bit EXF2 in T2CON. The EXF2 bit, like TF2, can generate an interrupt.
Figure 5-3.
Timer 2 capture mode
5.2.3
Auto-Reload mode
The auto-reload mode configures timer 2 as a 16-bit timer or event counter with automatic reload. The timer operates as
an up counter or as an up/down counter, as determined by the down counter enable bit (DCEN). When reset occurs,
DCEN is cleared, so in the auto-reload mode, timer 2 in configured as an up counter by default.
RCAP
2L
CLK
1/(3 x (T2PR(1:0) + 1))
TL2
TF2
„1‟
„0‟
T2 pin
TR2
C/T2
Interrupt
Control
Hardware
RCAP
2H
TH2
EXF2
T2EX pin
EXEN 2



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