ATPL00B datasheet(41/152 Pages) ATMEL

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Atmel ATPL00B [datasheet]

43028A-ATPL - 9/12

4.6

Interrupts

The microcontroller has 10 user interrupt sources:

2 external interrupts.

3 timer interrupts.

3 serial port interrupts.

2 standard serial peripheral interrupts.

Interrupt priorities are user selectable to a priority level ranging from “000” to “011” (higher value correspond to higher

priority level).

4.6.1

Interrupt Enabling

Each interrupt source can be individually enabled or disabled by setting or clearing a bit in the SFRs named IE and IE2

(Interrupt Enable). The IE register also contains a global disable bit, which can be cleared to disable all interrupts at

once.

Name

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

B it 0

ET2

ESPI

ET1

EX1

ET0

EX0



EA: „1‟ enables all interrupts; „0‟ disables all interrupts



ET2: „1‟ enables timer 2 interrupt; „0‟ disables timer 2 interrupt



ESPI: „1‟ enables serial peripheral interface0 interrupt; „0‟ disables serial peripheral

interface0 interrupt



ES: „1‟ enables serial port 0 interrupt; „0‟ disables serial port0 interrupt



ET1: „1‟ enables timer 1 interrupt; „0‟ disables timer 1 interrupt



EX1: „1‟ enables external interrupt 1; „0‟ disables external interrupt 1



ET0: „1‟ enables timer 0 interrupt; „0‟ disables timer 0 interrupt



EX0: „1‟ enables external interrupt 0; „0‟ disables external interrupt 0

Name

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

B it 0

IE2

ESPI1

ES2

ES1



--: Reserved bit



ESPI1: „1‟ enables serial peripheral interface1 interrupt; „0‟ disables serial peripheral

interface1 interrupt.



ES2: „1‟ enables serial port 2 interrupt; „0‟ disables serial port2 interrupt



ES1: „1‟ enables serial port 1 interrupt; „0‟ disables serial port1 interrupt

4.6.2

Interrupt Priorities

Each interrupt source can also be individually programmed to four priority levels by setting or clearing two bits in the

SFRs named IP, IPH and IP2HL (Interrupt Priority). Figure 4-11 shows how the IE, IE2, IP, IPH and IP2HL registers and

the polling sequence work to determine the interrupt to be served. The IP, IPH, IP2HL and IE2 registers contain a

number of unimplemented bits, these bits are reserved and user software should not write to these positions.

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