ATPL00B datasheet(92/152 Pages) ATMEL

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Atmel ATPL00B [datasheet]

43028A-ATPL - 9/12

10.

Media Access Layer

In power line communication (PLC) systems, medium access control (MAC) tasks require a high percent of the CPU

available computational time. To reduce the computational load of the integrated MCU (8051C3A Core) the ATPL00B

accelerates the execution of critical tasks by means of additional specific hardware units such as ADD1210 hardwired

MAC unit

MAC functional capabilities involve the construction of message packets and the management of correction and error

detection mechanisms.

The ATPL00B MAC is compatible with EHS and KONNEX. Moreover, its design is very versatile and allows the

construction of a wide range of datagram structures with the only constrain of hardware correction and detection codes.

10.1

Packet Encapsulation

Depending on enabled error correction and detection mechanisms, MAC can encapsulate packets following different

configurations:

Figure 10-1. Packet Encapsulation diagram

A standard packet encapsulation has the following structure

Figure 10-2. Datagram structure

2 byte

variable

2 bit

PREAMBLE

HEADER

PAYLOAD

POSTAMBLE

Preamble: two bytes long, containing 0xAAAA for bit synchronization. The preamble size is configurable by a

field in CTRL register 10.3.1

Header: two bytes long. It defines the type of datagram. ATPL00B supports FEC (Forward Error Correction)

shielded and unshielded headers. In shielded headers, each byte of the header field is protected by a FEC

field as shown below:



Unshielded header:

8-bit

Header MSB

Header LSB



Shielded header:

8-bit

6-bit

8-bit

6-bit

Header MSB

FEC

Header LSB

FEC

PREAMBLE

HEADER

PAYLOAD

POST

DATA1 DATA2

DATAN

FCSh

FCSi

DATA1

FEC1

DATAN

FECN

FCSh

FECh

FCSi

VITERBI (DATA 1, DATA 2,

… DATA N, FCSh, FCSi)

HEADER H

HEADER L

HEADER H

HEADER L

FEC

2 Bytes

2 bits

6 bits

8bits

2 Bytes

8bits

6 bits

8bits

6 bits

variable

16 x (N + 2) bits

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