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LAN9220 bảng dữ liệu(PDF) 91 Page - Microchip Technology

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Giải thích chi tiết về linh kiện  16-bit Non-PCI Small Form Factor 10/100 Ethernet Controller with Variable Voltage I/O & HP Auto-MDIX Support
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LAN9220 bảng dữ liệu(HTML) 91 Page - Microchip Technology

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 2006-2017 Microchip Technology Inc.
DS00002417A-page 91
LAN9220
5.3.24
E2P_DATA – EEPROM DATA REGISTER
This register is used in conjunction with the E2P_CMD register to perform read and write operations with the Serial
EEPROM.
9
EPC Time-out. If an EEPROM operation is performed, and there is no
response from the EEPROM within 30mS, the EEPROM controller will time-
out and return to its idle state. This bit is set when a time-out occurs
indicating that the last operation was unsuccessful.
Note:
If the EEDIO signal pin is externally pulled-high, EPC commands
will not time out if the EEPROM device is missing. In this case the
EPC Busy bit will be cleared as soon as the command sequence
is complete. It should also be noted that the ERASE, ERAL,
WRITE and WRAL commands are the only EPC commands that
will time-out if an EEPROM device is not present -and- the EEDIO
signal is pulled low
R/WC
0
8
MAC Address Loaded. When set, this bit indicates that a valid EEPROM
was found, and that the MAC address programming has completed
normally. This bit is set after a successful load of the MAC address after
power-up, or after a RELOAD command has completed
R/WC
-
7-0
EPC Address. The 8-bit value in this field is used by the EEPROM
Controller to address the specific memory location in the Serial EEPROM.
This is a Byte aligned address.
R/W
00h
Offset:
B4h
Size:
32 bits
Bits
Description
Type
Default
31-8
Reserved
RO
-
7:0
EEPROM Data. Value read from or written to the EEPROM.
R/W
00h
Bits
Description
Type
Default



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