LAN9220 datasheet(46/142 Pages) MICROCHIP

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LAN9220

DS00002417A-page 46

 2006-2017 Microchip Technology Inc.

3.12.5

CALCULATING ACTUAL TX DATA FIFO USAGE

The following rules are used to calculate the actual TX data FIFO space consumed by a TX Packet:

• TX command 'A' is stored in the TX data FIFO for every TX buffer.

• TX command 'B' is written into the TX data FIFO when the First Segment (FS) bit is set in TX command 'A.'

• When TX checksum is enabled, the 4-byte TX checksum preamble is written into TX Data FIFO.

• Any DWORD-long data added as part of the “Data Start Offset” is removed from each buffer before the data is

written to the TX data FIFO. Any data that is less than 1 DWORD is passed to the TX data FIFO.

• Payload from each buffer within a Packet is written into the TX data FIFO.

• Any DWORD-long data added as part of the End Padding is removed from each buffer before the data is written to

the TX data FIFO. Any end padding that is less than 1 DWORD is passed to the TX data FIFO.

3.12.6

TRANSMIT EXAMPLES

3.12.6.1

TX Example 1

In this example a single, 111-Byte Ethernet packet will be transmitted. This packet is divided into three buffers. The three

buffers are as follows:

Buffer 0:

• 7-Byte “Data Start Offset”

• 79-Bytes of payload data

• 16-Byte “Buffer End Alignment”

Buffer 1:

• 0-Byte “Data Start Offset”

• 15-Bytes of payload data

• 16-Byte “Buffer End Alignment”

Buffer 2:

• 10-Byte “Data Start Offset”

• 17-Bytes of payload data

• 16-Byte “Buffer End Alignment”

Figure 3-21, "TX Example 1" illustrates the TX command structure for this example, and also shows how data is passed

to the TX data FIFO.

Excessive Deferral. If the deferred bit is set in the control register, the setting of the excessive

deferral bit indicates that the transmission has ended because of a deferral of over 24288 bit times

during transmission.

Reserved. This bit is reserved. Always write zero to this bit to provide future compatibility.

Deferred. When set, this bit indicates that the current packet transmission was deferred.

Bits

Description

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