TMS320DM6431 datasheet(127/227 Pages) TI1

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TMS320DM6431

Digital Media Processor

www.ti.com

SPRS342C – NOVEMBER 2006 – REVISED JUNE 2008

Table 6-5. PSC Register Memory Map (continued)

HEX ADDRESS RANGE

DESCRIPTION

ACRONYM

0x01C4 1A34

MDCTL13

Module Control 13 Register (DDR2)

0x01C4 1A38

MDCTL14

Module Control 14 Register (EMIFA)

0x01C4 1A3C

–

Reserved

0x01C4 1A40

MDCTL16

Module Control 16 Register (McBSP0)

0x01C4 1A44

–

Reserved

0x01C4 1A48

MDCTL18

Module Control 18 Register (I2C)

0x01C4 1A4C

MDCTL19

Module Control 19 Register (UART0)

0x01C4 1A50

–

Reserved

0x01C4 1A54

–

Reserved

0x01C4 1A58

MDCTL22

Module Control 22 Register (HECC)

0x01C4 1A5C

MDCTL23

Module Control 23 Register (PWM0)

0x01C4 1A60

MDCTL24

Module Control 24 Register (PWM1)

0x01C4 1A64

MDCTL25

Module Control 25 Register (PWM2)

0x01C4 1A68

MDCTL26

Module Control 26 Register (GPIO)

0x01C4 1A6C

MDCTL27

Module Control 27 Register (TIMER0)

0x01C4 1A70

MDCTL28

Module Control 28 Register (TIMER1)

0x01C4 1A74 - 0x01C4 1A9B

–

Reserved

0x01C4 1A9C

MDCTL39

Module Control 39 Register (C64x+ CPU)

0x01C4 1AA0

–

Reserved

0x01C4 1AA4 - 0x01C4 1FFF

–

Reserved

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