TMS320DM6431 datasheet(103/227 Pages) TI1

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TMS320DM6431

Digital Media Processor

www.ti.com

SPRS342C – NOVEMBER 2006 – REVISED JUNE 2008

Table 3-40. EMIFA/VPSS Sub-Block 0 Configuration Choice B(1)

MAJOR

MINOR

PINMUX SELECTION FIELDS

RESULTING PERIPHERALS/PINS

CONFIG

AEM

AEAW

OTHERS

EMIFA

VPFE

# GPIO PINS

OPTION

8-bit EMIFA

(Async) Pinout

Config Summary

No CCDC

11 GP pins

mode 1 w/

EM_A[21:0]

Basic Pins You Get

EM_A[18:13]

001

100

CCDCSEL = 0

0 = GP[54, 43:36]

HVDSEL = 0

0 = GP[53:52]

CWENSEL = 0

0 = EM_R/W

CFLDSEL = 0

0 = EM_A21

CI10SEL = 0

0 = EM_A[19:20]

8-bit EMIFA

(Async) Pinout

Config Summary

8-to-10-bit CCDC

6-to-10 GP pins

mode 1 w/

EM_A[12:0] only

Basic Pins You Get

GP[51:46]

CCDCSEL = 1

1 = PCLK, YI[7:0]

001

000

HVDSEL = 0,1

1 = VD, HD

0 = GP[53:52]

CWENSEL = 0

0 = EM_R/W

0 = EM_A21

CFLDSEL = 0,1

1 = C_FIELD

(not used)

CI10SEL = 0,1

1 = CI[1:0]

0 = GP[45:44]

8-bit EMIFA

(Async) Pinout

Config Summary

8-to-10-bit CCDC

4-to-8 GP pins

mode 1 w/

EM_A[14:0] only

Basic Pins You Get

EM_A[13:14]

GP[49:46]

CCDCSEL = 1

1 = PCLK, YI[7:0]

001

HVDSEL = 0,1

1 = VD, HD

0 = GP[53:52]

CWENSEL = 0

0 = EM_R/W

0 = EM_A21

CFLDSEL = 0,1

1 = C_FIELD

(not used)

CI10SEL = 0,1

1 = CI[1:0]

0 = GP[45:44]

8-bit EMIFA

(Async) Pinout

Config Summary

8-to-10-bit CCDC

2-to-6 GP pins

mode 1 w/

EM_A[16:0] only

Basic Pins You Get

EM_A[16:13]

GP[47:46]

CCDCSEL = 1

1 = PCLK, YI[7:0]

001

010

HVDSEL = 0,1

1 = VD, HD

0 = GP[53:52]

CWENSEL = 0

0 = EM_R/W

0 = EM_A21

CFLDSEL = 0,1

1 = C_FIELD

(not used)

CI10SEL = 0,1

1 = CI[1:0]

0 = GP[45:44]

(1)

Italics indicate mandatory settings for a given Minor Configuration option.

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