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AM79C875KC bảng dữ liệu(PDF) 27 Page - Advanced Micro Devices

tên linh kiện AM79C875KC
Giải thích chi tiết về linh kiện  NetPHY??4LP Low Power Quad 10/100-TX/FX Ethernet Transceiver
PDF  48 Pages
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nhà sản xuất  AMD [Advanced Micro Devices]
Trang chủ  http://www.amd.com
Logo AMD - Advanced Micro Devices

AM79C875KC bảng dữ liệu(HTML) 27 Page - Advanced Micro Devices

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Am79C875
27
MII Management Status Register (Register 1)
Table 8.
Reg
Bit
Name
Description
Read/
Write
Default
1
15
100BASE-T4
1 = 100BASE-T4 able.
0 = Not 100BASE-T4.
RO
0
1
14
100BASE-TX Full
Duplex
1 = 100BASE-TX with full duplex.
0 = No 100BASE-TX full duplex ability.
RO
Set by
DPLX pin
1
13
100BASE-TX Half
Duplex
1 = 100BASE-TX with half duplex.
0 = No 100BASE-TX half-duplex ability.
RO
1
1
12
10BASE-T Full
Duplex
1 = 10BASE-T with full duplex.
0 = No 10BASE-T full duplex ability.
RO
Set by
DPLX pin
1
11
10BASE-T Half
Duplex
1 = 10BASE-T with half duplex.
0 = No 10BASE-T half duplex ability.
RO
1
1
10:7
Reserved
Ignore when read.
RO
0
1
6
MF Preamble
Suppression
1 = PHY can accept management (mgmt) frames with or
without preamble.
0 = PHY can only accept mgmt frames with preamble.
RO
1
1
5
Auto-Negotiation
Complete
1 = Auto-Negotiation process completed. Registers 4, 5, 6
are valid after this bit is set.
0 = Auto-Negotiation process not completed.
RO
0
1
4
Remote Fault
1 = Remote fault condition detected.
0 = No remote fault.
This bit will remain set until it is cleared by reading register
1 via management interface.
RO/LH
0
1
3
Auto-Negotiation
Ability
1 = Able to perform Auto-Negotiation function, its value is
determined by ANEGA pin.
0 = Unable to perform Auto-Negotiation function.
RO
Set by
ANEGA pin
1
2
Link Status
1 = Link is established, however, if the NetPHY™ 4LP
device link fails, this bit will be cleared and remain cleared
until register is read via management interface.
0 = Link is down.
RO/LL
0
1
1
Jabber Detect
1 = Jabber condition detect.
0 = No Jabber condition detected.
RO/LH
0
1
0
Extended
Capability
1 = Extended register capable. This bit is tied permanently
to one.
RO
1
MII Management Status Register (Register 1)



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