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STA559BW bảng dữ liệu(PDF) 54 Page - STMicroelectronics

tên linh kiện STA559BW
Giải thích chi tiết về linh kiện  Selectable 32- to 192-kHz input sample rates
PDF  67 Pages
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nhà sản xuất  STMICROELECTRONICS [STMicroelectronics]
Trang chủ  http://www.st.com
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STA559BW bảng dữ liệu(HTML) 54 Page - STMicroelectronics

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Register description
STA559BW
54/67
DocID18190 Rev 2
6.7.6
Coefficient b0 data register bits (addr 0x23 - 0x25)
6.7.7
Coefficient read/write control register (addr 0x26)
6.7.8
Description
Coefficients for user-defined EQ, mixing, scaling, and bass management are handled
internally in the STA559BW via RAM. Access to this RAM is available to the user via an I²C
register interface. A collection of I²C registers are dedicated to this function. One contains a
coefficient base address, five sets of three store the values of the 24-bit coefficients to be
written or that were read, and one contains bits used to control the write/read of the
coefficient(s) to/from RAM.
Note:
The read and write operation on RAM coefficients works only if LRCKI (pin 29) is switching.
Reading a coefficient from RAM
1.
Write 6-bits of address to I²C register 0x16.
2.
Write 1 to R1 bit in I²C address 0x26.
3.
Read top 8-bits of coefficient in I²C address 0x17.
4.
Read middle 8-bits of coefficient in I²C address 0x18.
5.
Read bottom 8-bits of coefficient in I²C address 0x19.
D7
D6
D5
D4
D3
D2
D1
D0
C4B15
C4B14
C4B13
C4B12
C4B11
C4B10
C4B9
C4B8
00
00
00
0
0
D7
D6
D5
D4
D3
D2
D1
D0
C4B7
C4B6
C4B5
C4B4
C4B3
C4B2
C4B1
C4B0
00
00
00
0
0
D7
D6
D5
D4
D3
D2
D1
D0
C5B23
C5B22
C5B21
C5B20
C5B19
C5B18
C5B17
C5B16
00
00
00
0
0
D7
D6
D5
D4
D3
D2
D1
D0
C5B15
C5B14
C5B13
C5B12
C5B11
C5B10
C5B9
C5B8
00
00
00
0
0
D7
D6
D5
D4
D3
D2
D1
D0
C5B7
C5B6
C5B5
C5B4
C5B3
C5B2
C5B1
C5B0
00
00
00
0
0
D7
D6
D5
D4
D3
D2
D1
D0
Reserved
RA
R1
WA
W1
0
0
000



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