ST7LITEUS2 datasheet(23/136 Pages) STMICROELECTRONICS

23 / 136 page

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ST7LITEUS2, ST7LITEUS5

Central processing unit

23/136

Central processing unit

5.1

Introduction

This CPU has a full 8-bit architecture and contains six internal registers allowing efficient 8-

bit data manipulation.

5.2

Main features

●

63 basic instructions

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Fast 8-bit by 8-bit multiply

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17 main addressing modes

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Two 8-bit index registers

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16-bit stack pointer

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Low power modes

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Maskable hardware interrupts

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Non-maskable software interrupt

5.3

CPU registers

The six CPU registers shown in Figure 7 are not present in the memory mapping and are

accessed by specific instructions.

5.3.1

Accumulator (A)

The Accumulator is an 8-bit general purpose register used to hold operands and the results

of the arithmetic and logic calculations and to manipulate data.

5.3.2

Index registers (X and Y)

In indexed addressing modes, these 8-bit registers are used to create either effective

addresses or temporary storage areas for data manipulation. (The cross-assembler

generates a precede instruction (PRE) to indicate that the following instruction refers to the

Y register.)

The Y register is not affected by the interrupt automatic procedures (not pushed to and

popped from the stack).

5.3.3

Program counter (PC)

The program counter is a 16-bit register containing the address of the next instruction to be

executed by the CPU. It is made of two 8-bit registers PCL (program counter low which is

the LSB) and PCH (program counter high which is the MSB).

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