HMC832LP6GETR datasheet(42/49 Pages) AD

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Data Sheet

HMC832

GENERAL-PURPOSE, SERIAL PORT INTERFACE, AND REFERENCE DIVIDER (GPO_SPI_RDIV) REGISTER

Table 27. Register 0x0F, GPO_SPI_RDIV Register (Default 0x000001)

Bit

Type

Name

Width

Default

Description

4:0

R/W

GPO_SELECT

The signal selected here is an output to the SDO pin when the SDO

pin is enable via Register 0x08[5]

0: data from Register 0x0F[5]

1: lock detect output

2: lock detect trigger

3: lock detect window output

4: ring oscillator test

5: pull-up hard from CSP

6: pull-down hard from CSP

7: reserved

8: reference buffer output

9: reference divider output

10: VCO divider output

11: modulator clock from VCO divider

12: auxiliary clock

13: auxiliary SPI clock

14: auxiliary SPI enable

15: auxiliary SPI data output

16: PD down

17: PD up

18: SD3 clock delay

19: SD3 core clock

20: autostrobe integer write

21: autostrobe fractional write

22: autostrobe auxiliary SPI

23: SPI latch enable

24: VCO divider sync reset

25: seed load strobe

26 to 29: not used

30: SPI output buffer enable

31: soft reset, RST

R/W

GPO test data

1: GPO test data

R/W

Prevent automux SDO

1: outputs GPO data only

0: automuxes between SDO and GPO data

R/W

LDO driver always on

1: LD_SDO pin driver always on

0: LD_SDO pin driver only on during SPI read cycle

R/W

Disable PFET

R/W

Disable NFET

Rev. A | Page 41 of 48

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