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MPC823 bảng dữ liệu(PDF) 67 Page - Motorola, Inc |
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MPC823 bảng dữ liệu(HTML) 67 Page - Motorola, Inc |
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67 / 74 page ![]() Communication Processor Module MOTOROLA MPC823 REFERENCE MANUAL 16-445 W—Wrap (Final Buffer Descriptor in Table) 0 = This is not the last buffer descriptor in the RX buffer descriptor table. 1 = This is the last buffer descriptor in the RX buffer descriptor table. After this buffer is used, the communication processor module receives incoming data into the first buffer descriptor that RBASE points to in the table. The number of RX buffer descriptors in this table is programmable and determined only by the W bit and overall space constraints of the dual-port RAM. I—Interrupt 0 No interrupt is generated after this buffer is filled. 1 The RXB bit in the SPIE register is set when this buffer is completely filled by the communication processor module, indicating the need for the core to process the buffer. The RXB bit can cause an interrupt if it is enabled. CM—Continuous Mode This bit is valid only when the serial peripheral interface is in master mode. In slave mode, it must be written as a zero. 0 = Normal operation. 1 = The E bit is not cleared by the communication processor module after this buffer descriptor is closed, thus allowing the associated data buffer to be automatically overwritten next time the communication processor module accesses this buffer descriptor. This allows continuous reception from an SPI slave into one buffer for autoscanning of a serial A/D peripheral with no core overhead. L—Last This bit is set by the serial peripheral interface when the buffer is closed because the SPISEL pin was negated. This only occurs when the serial peripheral interface is in slave mode. Otherwise, the ME bit is set. The serial peripheral interface writes this bit after the received data is placed into the associated data buffer. 0 = This buffer does not contain the last character of the message. 1 = This buffer contains the last character of the message. OV—Overrun This bit indicates that a receiver overrun has occurred during reception. This can only occur when the serial peripheral interface is in slave mode. The serial peripheral interface writes this bit after the received data is placed into the associated data buffer. ME—Multimaster Error This bit indicates that this buffer is closed because the SPISEL pin was asserted when the serial peripheral interface was in master mode. This indicates a synchronization problem between multiple masters on the SPI bus. The serial peripheral interface writes this bit after the received data is placed into the associated data buffer. |
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