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LAN9115 bảng dữ liệu(PDF) 101 Page - Microchip Technology

tên linh kiện LAN9115
Giải thích chi tiết về linh kiện  Highly Efficient Single-Chip 10/100 Non-PCI Ethernet Controller
PDF  114 Pages
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nhà sản xuất  MICROCHIP [Microchip Technology]
Trang chủ  http://www.microchip.com
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 2005-2016 Microchip Technology Inc.
DS00002269A-page 101
LAN9115
6.6
PIO Writes
PIO writes are used for all LAN9115 write cycles. PIO writes can be performed using Chip Select (nCS) or Write Enable
(nWR). Either or both of these control signals must go high between cycles for the period specified.
FIGURE 6-6:
PIO WRITE CYCLE TIMING
Note:
The “Data Bus” width is 16 bits.
TABLE 6-6:
PIO WRITE CYCLE TIMING
Symbol
Description
MIN
TYP
MAX
Units
tcycle
Write Cycle Time
165
ns
tcsl
nCS, nWR Assertion Time
32
ns
tcsh
nCS, nWR Deassertion Time
13
ns
tasu
Address Setup to nCS, nWR Assertion
0
ns
tah
Address Hold Time
0
ns
tdsu
Data Setup to nCS, nWR Deassertion
7
ns
tdh
Data Hold Time
0
ns
Note:
A PIO Write cycle begins when both nCS and nWR are asserted. The cycle ends when either or both nCS
and nWR are deasserted. They may be asserted and deasserted in any order.
Data Bus
nCS, nWR
A[7:1]



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