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MT9072AB bảng dữ liệu(PDF) 210 Page - Zarlink Semiconductor Inc |
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MT9072AB bảng dữ liệu(HTML) 210 Page - Zarlink Semiconductor Inc |
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210 / 275 page ![]() MT9072 Data Sheet 210 Zarlink Semiconductor Inc. 17.2.8 Transmit CAS (ABCD) Data Registers (Y51 - Y6F) Bit Functions Table 190 describes the bit functions of each (30 registers in total, one register for each PCM 30 channel) of the Transmit CAS Data Registers in the MT9072. Each register is repeated for each of the 8 framers. Framer 0 is addressed with Y=0, Framer 1 with Y=1, Framer 2 with Y=2 and so on up to Framer 7 with Y=7 (where Y represents the 4 most significant address bits (MSB) A11-A8). In addition, a simultaneous write to all 8 framers is possible by setting the MSB address to Y=8 (1000). Note that if corresponding MPST bit in the per timeslot control is not set this memory will be constantly updated with CSTi values. Hence to use this registers for any channels the corresponding MPST bit has to be set. A (0), (1) or (#) in the “Name” column of these tables indicates the state of the data bits after a reset (RESET, RSTC or RST). The (#) indicates that a (0) or (1) is possible. 2T2M (0) Timer 2 Mask. This is the mask bit for the T2I interrupt status bit in the National (CAS, National, CRC-4 Local and Timers) Interrupt Status Register (address Y36). If this mask bit is one, the corresponding interrupt bit will remain inactive. If this mask bit is zero, the corresponding interrupt bit will function normally. 1T1M (0) Timer 1 Mask. This is the mask bit for the T1I interrupt status bit in the National (CAS, National, CRC-4 Local and Timers) Interrupt Status Register (address Y36). If this mask bit is one, the corresponding interrupt bit will remain inactive. If this mask bit is zero, the corresponding interrupt bit will function normally. 0 ONESECM (0) One Second Timer Status Mask. This is the mask bit for the ONESECI interrupt status bit in the National (CAS, National, CRC-4 Local and Timers) Interrupt Status Register (address Y36). If this mask bit is one, the corresponding interrupt bit will remain inactive. If this mask bit is zero, the corresponding interrupt bit will function normally. Bit Name Functional Description 15-4 (#### #### ####) not used. 3A(n) (#) Transmit Channel Associated Signaling (CAS) Signaling Bits for Channel 1 to 30. Bits for n=1 to 15 correspond to channel 1 to 15 and are transmitted on the PCM30 link in timeslot 16 in bit positions one to four in frame n. Bits for n=17 to 31 correspond to channel 16 to 30 and are transmitted on the PCM30 link in timeslot 16 in bit positions five to eight in frame n -16. The corresponding CASS(n) bit must be one for this to function. 2B(n) (#) 1C(n) (#) 0D(n) (#) For these functions to be valid, CAS mode must be selected (CSIG=0 register address Y03), and the timeslot control must be selected (CASS(n)=1 register address Y90 to YAF). Table 185 - Channel n, Transmit CAS Data Register (Address Y51-Y6F) (E1) Bit Name Functional Description Table 184 - National (CAS, National, CRC-4 Local and Timers) Interrupt Mask Register (Address Y46) (E1) |
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