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MT9072AB bảng dữ liệu(PDF) 174 Page - Zarlink Semiconductor Inc |
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MT9072AB bảng dữ liệu(HTML) 174 Page - Zarlink Semiconductor Inc |
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174 / 275 page ![]() MT9072 Data Sheet 174 Zarlink Semiconductor Inc. 8PLBK (0) Payload Loopback. If one, all timeslots received on RPOS/RNEG are connected to TPOS/TNEG on the ST-BUS side(DSTo to DSTi) of the selected framer (Y) (this excludes time-slot 0). Hence the data passes through the receiver and output to DSTo. This DSTo data is looped back to DSTi which is transmitted to TPOS/TNEG by the transmitter. If zero, this feature is disabled. See Loopbacks section. 7E1 (0) E1 Error Insertion. A zero-to-one transition of this bit inserts a single E1 error into the transmit PCM30 data (bit position 1 of frame 13 of the CRC-4 Multiframe). A one, zero or one-to-zero transition has no function. 6E2 (0) E2 Error Insertion. A zero-to-one transition of this bit inserts a single E2 error into the transmit PCM30 data (bit position 1 of frame 15 of the CRC-4 Multiframe). A one, zero or one-to-zero transition has no function. 5 BVE (0) Bipolar Violation Error Insertion. A zero-to-one transition of this bit inserts a single bipolar violation error into the transmit PCM30 data. A one, zero or one-to-zero transition has no function. 4 CRCE (0) CRC-4 Error Insertion. A zero-to-one transition of this bit inserts a single CRC-4 error into the transmit PCM30 data. A one, zero or one-to-zero transition has no function. 3 FASE (0) Frame Alignment Signal Error Insertion. A zero-to-one transition of this bit inserts a single error into the timeslot zero frame alignment signal of the transmit PCM30 data. A one, zero or one-to-zero transition has no function. 2NFSE (0) Non-frame Alignment Signal Error Insertion. A zero-to-one transition of this bit inserts a single error into bit two of the timeslot zero non-frame alignment signal of the transmit PCM30 data. A one, zero or one-to-zero transition has no function. 1LOSE (0) Loss of Signal Error Insertion. If one, the selected framer (Y) transmits an all zeros signal (no pulses) in every PCM30 timeslot, and, the HDB3 control bit (reg address Y02) has no effect. If zero, data is transmitted normally. 0 PERR (0) Payload Error Insertion. A zero-to-one transition of this bit inserts a single error in the transmit payload. A one, zero or one-to-zero transition has no function. Bit Name Functional Description 15 14 COD1 COD0 (1 0) Line Coding. These two coding select bits determine the transmit and receive coding options as follows. See Figures 64 to 67. COD1 COD0 Function 0 0 RZ (Return to Zero, Dual Rail) 0 1 NRZ (Non-return to Zero, Single Rail) 1 0 NRZB (Non-return to Zero, Dual Rail) 1 1 No function 13 RHDB3 (0) RHDB3 (High Density Bipolar 3) encoding. If zero, HDB3 decoding is enabled in the receive direction. If one, AMI (Alternate Mark Inversion) signal without HDB3 decoding is enabled in the transmit direction. Table 144 - Interrupts and I/O Control Register (R/W Address Y02) (E1) Bit Name Functional Description Table 143 - Test, Error and Loopback Control Register (R/W Address Y01) (E1) |
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