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ST92185B bảng dữ liệu(PDF) 58 Page - STMicroelectronics

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ST92185B - RESET AND CLOCK CONTROL UNIT (RCCU)
4.3 OSCILLATOR CHARACTERISTICS
The on-chip oscillator circuit uses an inverting gate
circuit with tri-state output.
Notes:
Owing to the Q factor required, Ceramic
Resonators may not provide a reliable oscillator
source.
The oscillator can not support quartz crystal or ce-
ramic working at the third harmonic without exter-
nal tank circuits.
OSCOUT must not be used to drive external cir-
cuits.
Halt mode is set by means of the HALT instruction.
In this mode the parallel resistor, R, is disconnect-
ed and the oscillator is disabled. This forces the in-
ternal clock to a high level and OSCOUT to a high
impedance state.
To exit the HALT condition and restart the oscilla-
tor, an external RESET pulse is required.
It should be noted that, if the Watchdog function is
enabled, a HALT instruction will not disable the os-
cillator. This to avoid stopping the Watchdog if a
HALT
code is executed in error. When this occurs,
the CPU will be reset when the Watchdog times
out or when an external reset is applied.
When an HALT instruction is executed, the main
crystal oscillator is stoped and any spurious clock
are ignored. Other analog systems such as the on-
chip line PLL or the whole Video chain (Sync Ex-
traction) must be stopped separately by the soft-
ware as they will induce static consumption.
Table 8. Oscillator Transconductance
Figure 30. Crystal Oscillator
Note: Depending on the application it may be bet-
ter not to implement CL1
Figure 31. Internal Oscillator Schematic
Figure 32. External Clock
n
gm
Min
Typ
Max
mA/V
0.77
1.5
2.4
OSCIN
OSCOUT
CL1
CL2
ST9
CRYSTAL CLOCK
VR02116A
VR02086A
HALT
OSCIN
OSCOUT
RIN
ROUT
R
OSCIN
OSCOUT
CLOCK
INPUT
NC
EXTERNAL CLOCK
VR02116B



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