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ADV7181BBCPZ bảng dữ liệu(PDF) 13 Page - Analog Devices

tên linh kiện ADV7181BBCPZ
Giải thích chi tiết về linh kiện  Multiformat SDTV Video Decoder
PDF  96 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
nhà sản xuất  AD [Analog Devices]
Trang chủ  http://www.analog.com
Logo AD - Analog Devices

ADV7181BBCPZ bảng dữ liệu(HTML) 13 Page - Analog Devices

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ADV7181B
Rev. 0 | Page 13 of 96
Table 8. Manual Mux Settings for All ADCs (SETADC_sw_man_en = 1)
ADC0_sw[3:0]
ADC0 Connected To:
ADC1_sw[3:0]
ADC1 Connected To:
ADC2_sw[3:0]
ADC2 Connected To:
0000
No Connection
0000
No Connection
0000
No Connection
0001
AIN2
0001
No Connection
0001
No Connection
0010
No Connection
0010
No Connection
0010
No Connection
0011
No Connection
0011
No Connection
0011
No Connection
0100
AIN4
0100
AIN4
0100
No Connection
0101
AIN6
0101
AIN6
0101
AIN6
0110
No Connection
0110
No Connection
0110
No Connection
0111
No Connection
0111
No Connection
0111
No Connection
1000
No Connection
1000
No Connection
1000
No Connection
1001
AIN1
1001
No Connection
1001
No Connection
1010
No Connection
1010
No Connection
1010
No Connection
1011
No Connection
1011
No Connection
1011
No Connection
1100
AIN3
1100
AIN3
1100
No Connection
1101
AIN5
1101
AIN5
1101
AIN5
1110
No Connection
1110
No Connection
1110
No Connection
1111
No Connection
1111
No Connection
1111
No Connection
CONNECTING
ANALOG SIGNALS
TO ADV7181B
SET INSEL[3:0] TO
CONFIGURE ADV7181B TO
DECODE VIDEO FORMAT:
CVBS: 0000
YC: 0110
YPrPb: 1001
CONFIGURE ADC INPUTS USING
MUXING CONTROL BITS
(ADC_sw_man_en,
ADC0_sw,adc1_sw, ADC2_sw)
Figure 6. Input Muxing Overview
INSEL[3:0] Input Selection, Address 0x00 [3:0]
The INSEL bits allow the user to select the input format. It
configures the standard definition processor core to process
CVBS (Comp), S-Video (Y/C), or Component (YPbPr) format.
Table 9. Standard Definition Processor Format Selection,
INSEL[3:0]
INSEL[3:0]
Video Format
0000
Composite
0110
YC
1001
YPrPb



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