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PC87365 bảng dữ liệu(PDF) 63 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
tên linh kiện PC87365
Giải thích chi tiết về linh kiện  128-Pin LPC SuperI/O with System Hardware Monitoring
PDF  215 Pages
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nhà sản xuất  NSC [National Semiconductor (TI)]
Trang chủ  http://www.national.com
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PC87365 bảng dữ liệu(HTML) 63 Page - National Semiconductor (TI)

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2.0 Device Architecture and Configuration (Continued)
63
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2.13 SERIAL PORT 1 CONFIGURATION
2.13.1
Logical Device 3 (SP1) Configuration
Table 23 lists the configuration registers that affect the Serial Port 2. Only the last register (F0h) is described here. See Sec-
tions 2.2.3 and 2.2.4 for descriptions of the others.
Table 23. Serial Port 1 Configuration Registers
2.13.2
Serial Port 1 Configuration Register
This register is reset by hardware to 02h.
Location:
Index F0h
Type:
R/W
Index
Configuration Register or Action
Type
Reset
30h Activate. See also bit 0 of the SIOCF1 register and bit 3 of the SIOCF6 register. R/W
00h
60h Base Address MSB register. Bits 7-3 (for A15-11) are read only, 00000b.
R/W
03h
61h Base Address LSB register. Bit 2-0 (for A2-0) are read only, 000b.
R/W
F8h
70h Interrupt Number and Wake-Up on IRQ Enable register (see note, p. 35).
R/W
04h
71h Interrupt Type. Bit 1 is R/W; other bits are read only.
R/W
03h
74h Report no DMA Assignment.
RO
04h
75h Report no DMA Assignment.
RO
04h
F0h Serial Port 1 Configuration register.
R/W
02h
Bit
76543210
Name
Bank
Select
Enable
Reserved
Busy
Indicator
Power
Mode
Control
TRI-STATE
Control
Reset
00000010
Bit
Description
7
Bank Select Enable. Enables bank switching for Serial Port 1.
0: Disabled (default).
1: Enabled
6-3
Reserved.
2
Busy Indicator. This read only bit can be used by power management software to decide when to power-down
the Serial Port 1 logical device.
0: No transfer in progress (default).
1: Transfer in progress.
1
Power Mode Control. When the logical device is active in:
0: Low power mode
Serial Port 1 Clock disabled. The output signals are set to their default states. The RI input signal can be
programmed to generate an interrupt. Registers are maintained. (Unlike Active bit in Index 30 that also
prevents access to Serial Port 1 registers.)
1: Normal power mode
Serial Port 1 clock enabled. Serial Port 1 is functional when the logical device is active (default).
0
TRI-STATE Control. When enabled and the device is inactive, the logical device output pins are in TRI-STATE.
0: Disabled (default)
1: Enabled



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