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PC87365 bảng dữ liệu(PDF) 55 Page - National Semiconductor (TI) |
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PC87365 bảng dữ liệu(HTML) 55 Page - National Semiconductor (TI) |
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55 / 215 page ![]() 2.0 Device Architecture and Configuration (Continued) 55 www.national.com 2.9.13 SuperI/O Configuration D Register (SIOCFD) This is a battery-backed register. Location: Index 2Dh Type: Varies per bit Bit 76543210 Name LED Polarity Control Last PSON State PSON Polarity Crowbar Timeout Resume Last PSON State Power Supply Off Power Button Mode Reset 0 0 Strap 11000 Bit Description 7 LED Polarity Control. This is a R/W bit. It determines if the LED outputs are active high or active low when they are lit. 0: Active high (default at VSB power-up reset) 1: Active low 6 Last Power Supply On State. This is a RO bit. When operating in Legacy mode (bit 0 of this register is set to 0), this bit reflects the state of the PSON pin sampled during the last power failure (no VSB), regardless of the polarity of PSON. 0: Off 1: On 5 Power Supply On Polarity. This is a RO bit. The polarity of PSON is determined during VSB power-up by the PSONPOL strap. 4-3 Crowbar Timeout. This is a R/W bit. Bits 5 4 Value (Seconds) 0 0 0.4 to 0.9 (typical 0.6) 0 1 0.9 to 1.4 (typical 1.1) 1 0 1.4 to 1.9 (typical 1.6) 1 1 1.9 to 2.5 (typical 2.1) (default at VPP power-up reset) Note that for any specific condition, there is a minimum gap of 0.25 seconds between the actual high limit of a time- out setting and the low limit of the next time-out setting. 2 Resume Last Power Supply On State. This is a R/W bit. When it is set to 1, PSON resumes its last state, sampled during the last power failure, after power returns. When this bit is set to 0, the PSON state is determined by the SLPS3 state. 0: SLPS3 (default at VPP power-up reset) 1: Last PSON state. For correct operation, the system’s ACPI controller must be configured to resume to OFF. This enables the power supply control logic to know the state of the chipset ACPI state machine after power failure (no VDD and VSB). 1 Power Supply Off. This is a R/W bit. It always returns 0 when read. When using Legacy mode (bit 0 is set to 0) and setting this bit to 1, this bit inactivates the PSON output, thereby shutting off the power supply. 0: No action (default at VPP power-up reset) 1: Inactivate PSON in Legacy mode 0 Power Button Mode. This is a R/W bit. 0: Legacy (default at VSB power-up reset) 1: ACPI |
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