© VITESSE SEMICONDUCTOR CORPORATION

Page 3

9/14/98

741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896

VITESSE

SEMICONDUCTOR CORPORATION

Advance Product Information

VSC8162

2.488 Gbit/sec SONET/SDH

1:16 Demux with Clock Recovery

G52209-0, Rev. 2.0

PADJ are ECL compatible inputs (see Table 6). If the pins are left floating, the inputs will default to the

resistor.

Table 1: Retiming Phase Adjust Settings

PADJ4

PADJ3

PADJ2

PADJ1

PADJ0

Degrees

From Center

PS From

Center

00000

0.00

0.0

00001

11.25

12.6

00010

22.50

25.1

00011

33.75

37.7

00100

45.00

50.2

00101

56.25

62.8

00110

67.50

75.4

00111

78.75

87.9

01000

90.00

100.5

01001

101.25

113.0

01010

112.50

125.6

01011

123.75

138.2

01100

135.00

150.7

01101

146.25

163.3

01110

157.50

175.8

01111

168.75

188.4

10000

180.00

201.0

10001

-168.75

-188.4

10010

-157.50

-175.8

10011

-146.25

-163.3

10100

-135.00

-150.7

10101

-123.75

-138.2

10110

-112.50

-125.6

10111

-101.25

-113.0

11000

-90.00

-100.5

11001

-78.75

-87.9

11010

-67.50

-75.4

11011

-56.25

-62.8

11100

-45.00

-50.2

11101

-33.75

-37.7

11110

-22.50

-25.1

11111

-11.25

-12.6