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VSC8162 bảng dữ liệu(PDF) 1 Page - Vitesse Semiconductor Corporation |
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VSC8162 bảng dữ liệu(HTML) 1 Page - Vitesse Semiconductor Corporation |
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1 / 20 page ![]() © VITESSE SEMICONDUCTOR CORPORATION Page 1 9/14/98 741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896 VITESSE SEMICONDUCTOR CORPORATION Advance Product Information VSC8162 2.488 Gbit/sec SONET/SDH 1:16 Demux with Clock Recovery G52209-0, Rev. 2.0 Features General Description The VSC8162 combines a clock recovery unit (CRU) with a 1:16 demultiplexer on a single chip to directly generate 16-bit wide data from an incoming 2.488Gb/s NRZ data stream. An on-chip Phase Locked Loop (PLL) generates a 2.488GHz clock which remains phase locked to the incoming data. The incoming data is retimed and demultiplexed to a 16-bit word. A Loss of Lock (LOL) signal indicates gross conditions where incoming data no longer has sufficient transitions to keep the CRU in lock. VSC8162 Functional Block DIagram • 2.488Gb/s 1:16 Demux with Integrated Clock and Data Recovery • Recovered Clock and Data Available • Monolithic Phase Locked Loop • Digitally Adjustable Serial Data Sampling Point • Differential Low Speed Outputs • Differential/Single-ended Reference Clock • Loss of Lock Detection • Meets SONET OC-48 and SDH STM-16 Jitter Tolerance Requirements RTDO+ RTDO– D0+ D0– D15+ D15– PARITY+ PARITY– CLK16+ CLK16– CLKO+ CLKO– DI+ DI– REFCK+ REFCK– PADJ[4:0] DINVERT LOL NOREF Clock Recovery Data Retime Divide by 16 5 |
Số phần tương tự - VSC8162 |
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Mô tả tương tự - VSC8162 |
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