© VITESSE SEMICONDUCTOR CORPORATION

Page 9

9/14/98

741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896

VITESSE

SEMICONDUCTOR CORPORATION

Advance Product Information

VSC8162

2.488 Gbit/sec SONET/SDH

1:16 Demux with Clock Recovery

G52209-0, Rev. 2.0

Figure 8 is a DC coupled termination method and provides the best low frequency response. For applica-

tions with low data transition density, a DC coupling termination such as that shown in Figure 6 may be

required.

Figure 8: Low-Speed Output Termination #3

Figure 9 is provided to show that after the AC coupling capacitors, the 50

Ω termination resistors can be ter-

minated to any DC voltage, shown in Figure 9 by the ground symbol. Please note that Figure 9 will not work

when interfacing the VSC8162 directly to the VSC8161.

Figure 9: Low-Speed Output Termination #4

8162

50

Ω

50

Ω

-1.1V

-1.1V

Receiving Device

8162

0.1

µF

0.1

µF

50

Ω

50

Ω

Receiving Device