LM93 datasheet(75/92 Pages) NSC

75 / 92 page

16.0 Registers (Continued)

16.8.19 Register CEh

PWM2 Control 3

Address

Read/

Write

Name

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Default

Value

CEh

R/W

PWM2

Control 3

SU_DUR

RES

SU_DC

00h

Bit

Name

R/W

Description

3:0

SU_DC

R/W

This field sets the duty cycle that used whenever

PWM2 experiences a Spin-Up cycle. This field

accepts 16 possible values that are mapped to duty

cycles according the table in the Auto-Fan Control

section. Setting this field to 0h effectively disables

Spin-Up.

RES

Reserved

7:5

SU_DUR

R/W

Sets the Spin-Up duration for PWM2.

Bits 7:5 configure the spin-up duration. When the duty cycle of PWM2 changes from zero to a non-zero value, the spin-up

sequence is activated for the specified amount of time. The available settings are defined according to this table:

SU_DUR

Spin-Up Time

Spin-up disabled

100 ms

250 ms

400 ms

700 ms

1000 ms

2000 ms

4000 ms

16.8.20 Register CFh

Special Function PWM2 Control 4

Address

Read/

Write

Name

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Default

Value

CFh

R/W

Special Function

PWM2

Control 4

RES

FREQ2

00h

Bit

Name

R/W

Description

2:0

FREQ2

R/W

PWM2 frequency control. Controls the frequency of

the PWM2 output in the same fashion as FREQ1 in

the PWM1 Control 4 register.

7:3

RES

Reserved

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