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LM93 bảng dữ liệu(PDF) 61 Page - National Semiconductor (TI) |
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LM93 bảng dữ liệu(HTML) 61 Page - National Semiconductor (TI) |
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61 / 92 page ![]() 16.0 Registers (Continued) 16.7.6 Register B4–BBh Fan Tach Limit Registers Register Address Read/ Write Register Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Default Value B4h R/W Fan Tach 1 Limit LSB TLIMIT1[5:0] RES FCh B5h R/W Fan Tach 1 Limit MSB TLIMIT1[13:6] FFh B6h R/W Fan Tach 2 Limit LSB TLIMIT2[5:0] RES FCh B7h R/W Fan Tach 2 Limit MSB TLIMIT2[13:6] FFh B8h R/W Fan Tach 3 Limit LSB TLIMIT3[5:0] RES FCh B9h R/W Fan Tach 3 Limit MSB TLIMIT1[13:6] FFh BAh R/W Fan Tach 4 Limit LSB TLIMIT4[5:0] RES FCh BBh R/W Fan Tach 4 Limit MSB TLIMIT4[13:6] FFh If a tachometer reading exceeds its limit (as defined by these registers) the corresponding bit is set in the Host and BMC Error Status registers. The fan tachometer readings can be associated with a particular PWM output, but the tach errors are not automatically masked when a PWM is at 0% or set to level that causes the fan RPM to be below the limit purposely. In order to prevent false errors, care needs to be taken to make sure that the Fan Tach Limits are properly set. Errors are never generated for a fan if its limit is set to 3FFFh. www.national.com 61 |
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