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TMS320VC5401 bảng dữ liệu(PDF) 46 Page - Texas Instruments |
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TMS320VC5401 bảng dữ liệu(HTML) 46 Page - Texas Instruments |
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46 / 81 page ![]() Electrical Specifications 46 December 2000 − Revised February 2004 SPRS153C 5 Electrical Specifications This section provides the absolute maximum ratings and the recommended operating conditions for the TMS320VC5401 DSP. 5.1 Absolute Maximum Ratings The list of absolute maximum ratings are specified over operating case temperature. Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under Section 5.2 is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All supply voltage values (core and I/O) are with respect to VSS. Figure 5−1 provides the test load circuit values for a 3.3-V device. Supply voltage I/O range, DVDD −0.3 V to 4.0 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Supply voltage core range, CVDD −0.3 V to 2.4 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Input voltage range, VI −0.3 V to 4.5 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Output voltage range, VO −0.3 V to 4.5 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Operating case temperature range, TC −40°C to 100°C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Storage temperature range, Tstg −55°C to 150°C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.2 Recommended Operating Conditions MIN NOM MAX UNIT DVDD Device supply voltage, I/O† 3 3.3 3.6 V CVDD Device supply voltage, core† 1.71 1.8 1.98 V VSS Supply voltage, GND 0 V Hi h l l i t lta RS, INTn, NMI, BIO, BCLKR0, BCLKR1, BCLKX0, BCLKX1, HCS, HDS1, HDS2, TDI, TMS, CLKMDn 2.3 DVDD + 0.3 VIH High-level input voltage DVDD = 3.3" 0.3 V X2/CLKIN‡ 1.45 CVDD+0.3 V DVDD = 3.3" 0.3 V TCK, TRST 2.6 DVDD + 0.3 All other inputs 2.1 DVDD + 0.3 VIL Low-level input voltage DVDD = 3.3" 0.3 V RS, INTn, NMI, X2/CLKIN, BIO, BCLKR0, BCLKR1, BCLKX0, BCLKX1, HCS, HDS1, HDS2, TCK, CLKMDn −0.3 0.5 V DVDD = 3.3" 0.3 V All other inputs −0.3 0.7 IOH High-level output current 300 µA IOL Low-level output current 1.5 mA TC Operating case temperature −40 100 °C † Texas Instrument DSPs do not require specific power sequencing between the core supply and the I/O supply. However, systems should be designed to ensure that neither supply is powered up for extended periods of time if the other supply is below the proper operating voltage. Excessive exposure to these conditions can adversely affect the long term reliability of the devices. System-level concerns such as bus contention may require supply sequencing to be implemented. In this case, the core supply should be powered up at the same time as or prior to the I/O buffers and then powered down after the I/O buffers. ‡ All revisions of the 5401 can be operated with an external clock source, provided that the proper voltage levels be driven on the X2/CLKIN pin. It should be noted that the X2/CLKIN pin is referenced to the device 1.8V power supply (CVDD), rather than the 3V I/O supply (DVDD). Refer to the recommended operating conditions section of this document for the allowable voltage levels of the X2/CLKIN pin. |
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