PCM4204PAPR datasheet(16/38 Pages) TI1

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PCM4204

SBAS327A − JUNE 2004 − REVISED SEPTEMBER 2004

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SCKI

SCKIH

SCKIL

PARAMETER

DESCRIPTION

MIN

MAX

UNITS

System Clock Period

t SCKIH

System Clock High Pulse Time

tSCKIL

System Clock Low Pulse Time

t SCKI

Figure 2. System Clock Timing Requirements

SAMPLING MODES

The PCM4204 may be operated in one of three PCM

sampling modes, or at one of two DSD output data rates.

The PCM sampling modes are referred to as Single Rate,

Dual Rate, and Quad Rate.

Single Rate mode is utilized for sampling rates up to

54kHz. The delta-sigma modulator oversamples the

analog input signal by a rate equal to 128 times the desired

output sampling rate.

Dual Rate mode is utilized for sampling rates higher than

54kHz and up to 108kHz. The delta-sigma modulator

oversamples the analog input signal by a rate equal to 64

times the desired output sampling rate.

Quad Rate mode is utilized for sampling frequencies

higher than 108kHz and up to 216kHz. The delta-sigma

modulator oversamples the analog input signal by a rate

equal to 32 times the desired output sampling rate.

For DSD output data, the user may select either 64fS or

128fS oversampled data rates, where fS is the base

sampling rate, which is 44.1kHz for Super Audio CD

(SACD) applications. The 64fS data rate is analogous to

the Dual Rate PCM sampling mode, where the analog

input signal is oversampled by a rate equal to 64 times the

base sampling rate. The 128fS data rate corresponds to

the Single Rate PCM sampling mode, where the analog

input signal is oversampled by a rate equal to 128 times the

base sampling rate. For DSD input data, the rate of the

data must be known in order to configure the digital

decimation filter for either 1/64 or 1/128 operation.

Table 1 indicates the sampling mode utilized for common

system clock and sampling rate combinations. The FS0

(pin 12), FS1 (pin 13), and FS2 (pin 14) inputs are utilized

to select the sampling mode for the PCM4204. If the state

of the sampling mode pins is changed any time after

power-up reset initialization, the user should issue an

external forced reset to re-initialize the PCM4204. Table 2,

Table 3, Table 4, and Table 5 indicate the sampling mode

selections for PCM Master and Slave mode operation, as

well as the DSD Output and Input mode operation.

Table 2. Sampling Mode Selection for PCM

Master Mode Operation

FS2

FS1

FS0

SAMPLING MODE WITH

SYSTEM CLOCK RATE

Single Rate with fSCKI = 768fS

Single Rate with fSCKI = 512fS

Single Rate with fSCKI = 384fS

Single Rate with fSCKI = 256fS

Dual Rate with fSCKI = 384fS

Dual Rate with fSCKI = 256fS

Quad Rate with fSCKI = 192fS

Quad Rate with fSCKI = 128fS

Table 3. Sampling Mode Selection for PCM Slave

Mode Operation

FS2

FS1

FS0

SAMPLING MODE

Single Rate with Clock Auto-Detection

Dual Rate with Clock Auto-Detection

Quad Rate with Clock Auto-Detection

Reserved

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