VT82C596 datasheet(32/96 Pages) ETC

32 / 96 page

VT82C596B

Revision 0.3 June 17, 1999

-26-

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PCI Function 3 Registers – Power Management

Configuration Space Power Management Header Registers

Offset PCI Configuration Space Header

Default

Acc

1-0

Vendor ID

1106

3-2

Device ID

3050

5-4

Command

0000

7-6

Status

0280

Revision ID

9Programming Interface

†

Sub Class Code

†

Base Class Code

†

Cache Line Size

Latency Timer

Header Type00

FBIST

10-3F -reserved-

—

† Default values may be changed by writing to offsets 61-63h.

Configuration Space Power Management-Specific Registers

Offset Power Management

Default

Acc

Debounce Control

General Configuration

SCI Interrupt Configuration

-reserved-

—

45-44 Primary Interrupt Channel

0000

47-46 Secondary Interrupt Channel

0000

4B-48 Power Mgmt I/O Base (256 Bytes)

0000 0001 RW

Host Bus Power Management Control

Clock Stop Control

4E-4F -reserved-

—

53-50 GP0/1 Timer Control

0000 0000 RW

GPIO Select

Wakeup Control

56-57 -reserved-

—

5B-58 GP2/3 Timer Control

0000 0000 RW

5C-60 -reserved-

—

Write value for Offset 9 (Prog Intfc)

Write value for Offset A (Sub Class)

Write value for Offset B (Base Class)

64-8F -reserved-

—

Offset System Management Bus

Default

Acc

93-90 SMBus I/O Base

0000 0001 RW

94-D1 -reserved-

—

SMBus Control

SMBus Host Slave Command

SMBus Slave Address for Port 1

SMBus Slave Address for Port 2

SMBus Revision ID

D7-FF -reserved-

—

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